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From: Patrick DELAUNAY <patrick.delaunay@st.com>
To: u-boot@lists.denx.de
Subject: [PATCH V2 5/6] ARM: dts: stm32: Rework DDR DT inclusion
Date: Wed, 22 Apr 2020 09:06:34 +0000	[thread overview]
Message-ID: <03cc3672967d4054a9bc22ef0f2edb06@SFHDAG6NODE3.st.com> (raw)
In-Reply-To: <20200410185550.152712-5-marex@denx.de>

Dear Marek,

> From: Marek Vasut <marex@denx.de>
> Sent: vendredi 10 avril 2020 20:56
> 
> Adjust the DDR configuration dtsi such that they only generate the DRAM
> configuration node, the DDR controller node is moved into the stm32mp157-u-
> boot.dtsi itself. This permits including multiple DDR configuration dtsi files in
> board DT.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Cc: Patrick Delaunay <patrick.delaunay@st.com>
> Cc: Patrice Chotard <patrice.chotard@st.com>
> ---
> V2: Add compatible string
> ---
>  arch/arm/dts/stm32mp15-ddr.dtsi               | 358 +++++++++++-------
>  .../dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi   |   1 +
>  .../dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi   |   1 +
>  arch/arm/dts/stm32mp157-u-boot.dtsi           |  25 ++
>  4 files changed, 248 insertions(+), 137 deletions(-)
> 
> diff --git a/arch/arm/dts/stm32mp15-ddr.dtsi b/arch/arm/dts/stm32mp15-ddr.dtsi
> index 38f29bb789..026237b088 100644
> --- a/arch/arm/dts/stm32mp15-ddr.dtsi
> +++ b/arch/arm/dts/stm32mp15-ddr.dtsi
> @@ -2,153 +2,237 @@
>  /*
>   * Copyright : STMicroelectronics 2018
>   */
> +#include <linux/stringify.h>
> 
> -/ {
> -	soc {
> -		ddr: ddr at 5a003000 {
> -			u-boot,dm-pre-reloc;
> +&ddr {
> +	config-DDR_MEM_COMPATIBLE {
> +		u-boot,dm-pre-reloc;
> -			compatible = "st,stm32mp1-ddr";
> +		compatible = __stringify(st,DDR_MEM_COMPATIBLE);

I have just a concern here, but only for ST ecosystem.

As the DDR_MEM_COMPATIBLE is not generated by CubeMX tools. 

But I will manage it after.....

2 solution; I add a default value.

#ifndef DDR_MEM_COMPATIBLE
#define DDR_MEM_COMPATIBLE ddr-0
#endif

Or don't create sub-node when the COMPATIBLE is absent.

So for this patch:

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>

Thanks

Patrick

  reply	other threads:[~2020-04-22  9:06 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-10 18:55 [PATCH V2 1/6] ARM: stm32: Add default config for DHCOR Marek Vasut
2020-04-10 18:55 ` [PATCH V2 2/6] ARM: stm32: Add board_early_init_f() to SPL Marek Vasut
2020-04-22  8:26   ` Patrick DELAUNAY
2020-04-10 18:55 ` [PATCH V2 3/6] ARM: stm32: Implement board coding on AV96 Marek Vasut
2020-04-22  8:36   ` Patrick DELAUNAY
2020-04-10 18:55 ` [PATCH V2 4/6] ram: stm32mp1: Add support for multiple configs Marek Vasut
2020-04-21 17:57   ` Patrick DELAUNAY
2020-04-10 18:55 ` [PATCH V2 5/6] ARM: dts: stm32: Rework DDR DT inclusion Marek Vasut
2020-04-22  9:06   ` Patrick DELAUNAY [this message]
2020-04-22 11:15     ` Marek Vasut
2020-04-10 18:55 ` [PATCH V2 6/6] ARM: stm32: Implement DDR3 coding on DHCOR SoM Marek Vasut
2020-04-22  9:08   ` Patrick DELAUNAY
2020-04-22  8:24 ` [PATCH V2 1/6] ARM: stm32: Add default config for DHCOR Patrick DELAUNAY
2020-05-14  7:27   ` Patrick DELAUNAY

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