From: Paolo Bonzini <pbonzini@redhat.com>
To: Wanpeng Li <kernellwp@gmail.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: Sean Christopherson <seanjc@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>
Subject: Re: [PATCH v2 2/3] KVM: LAPIC: Reset TMCCT during vCPU reset
Date: Tue, 8 Jun 2021 18:27:15 +0200 [thread overview]
Message-ID: <0584d79d-9f2c-52dd-5dcc-beffd18f265b@redhat.com> (raw)
In-Reply-To: <1623050385-100988-2-git-send-email-wanpengli@tencent.com>
On 07/06/21 09:19, Wanpeng Li wrote:
> From: Wanpeng Li <wanpengli@tencent.com>
>
> The value of the current counter register after reset is 0 for both
> Intel and AMD, let's do it in kvm, though, the TMCCT is always computed
> on-demand and never directly readable.
It's useless though since it's never read except by KVM_SET_LAPIC.
Perhaps instead set TMCCT to 0 in kvm_apic_set_state, instead of keeping
the value that was filled in by KVM_GET_LAPIC?
Paolo
> Reviewed-by: Jim Mattson <jmattson@google.com>
> Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
> ---
> v1 -> v2:
> * update patch description
>
> arch/x86/kvm/lapic.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 6d72d8f..cbfdecd 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -2352,6 +2352,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event)
> kvm_lapic_set_reg(apic, APIC_ICR2, 0);
> kvm_lapic_set_reg(apic, APIC_TDCR, 0);
> kvm_lapic_set_reg(apic, APIC_TMICT, 0);
> + kvm_lapic_set_reg(apic, APIC_TMCCT, 0);
> for (i = 0; i < 8; i++) {
> kvm_lapic_set_reg(apic, APIC_IRR + 0x10 * i, 0);
> kvm_lapic_set_reg(apic, APIC_ISR + 0x10 * i, 0);
>
next prev parent reply other threads:[~2021-06-08 16:27 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-07 7:19 [PATCH v2 1/3] KVM: LAPIC: Write 0 to TMICT should also cancel vmx-preemption timer Wanpeng Li
2021-06-07 7:19 ` [PATCH v2 2/3] KVM: LAPIC: Reset TMCCT during vCPU reset Wanpeng Li
2021-06-08 16:27 ` Paolo Bonzini [this message]
2021-06-09 2:15 ` Wanpeng Li
2021-06-09 5:51 ` Paolo Bonzini
2021-06-09 7:18 ` Wanpeng Li
2021-06-07 7:19 ` [PATCH v2 3/3] KVM: X86: Let's harden the ipi fastpath condition edge-trigger mode Wanpeng Li
2021-06-08 16:27 ` Paolo Bonzini
2021-06-08 16:35 ` Sean Christopherson
2021-06-08 17:40 ` Paolo Bonzini
2021-06-09 2:08 ` Wanpeng Li
2021-06-08 16:27 ` [PATCH v2 1/3] KVM: LAPIC: Write 0 to TMICT should also cancel vmx-preemption timer Paolo Bonzini
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