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From: Andrew Cooper <Andrew.Cooper3@citrix.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	LKML <linux-kernel@vger.kernel.org>
Cc: "x86@kernel.org" <x86@kernel.org>,
	"Edgecombe, Rick P" <rick.p.edgecombe@intel.com>
Subject: Re: [patch 1/3] x86/fpu/xsave: Support XSAVEC in the kernel
Date: Mon, 4 Apr 2022 16:10:38 +0000	[thread overview]
Message-ID: <11c10899-da35-f0bf-51f6-41210e234c95@citrix.com> (raw)
In-Reply-To: <20220404104820.598704095@linutronix.de>

On 04/04/2022 13:11, Thomas Gleixner wrote:
> --- a/arch/x86/kernel/fpu/xstate.c
> +++ b/arch/x86/kernel/fpu/xstate.c
> @@ -623,6 +628,10 @@ static unsigned int __init get_xsaves_si
>  	 *    containing all the state components
>  	 *    corresponding to bits currently set in
>  	 *    XCR0 | IA32_XSS.
> +	 *
> +	 * When XSAVES is not available but XSAVEC (virt)

"but XSAVEC is" ?

~Andrew

  reply	other threads:[~2022-04-04 21:59 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-04 12:11 [patch 0/3] x86/fpu/xsave: Add XSAVEC support and XGETBV1 utilization Thomas Gleixner
2022-04-04 12:11 ` [patch 1/3] x86/fpu/xsave: Support XSAVEC in the kernel Thomas Gleixner
2022-04-04 16:10   ` Andrew Cooper [this message]
2022-04-14 14:43   ` Dave Hansen
2022-04-25 13:11   ` [tip: x86/fpu] " tip-bot2 for Thomas Gleixner
2022-04-04 12:11 ` [patch 2/3] x86/fpu/xsave: Prepare for optimized compaction Thomas Gleixner
2022-04-14 15:46   ` Dave Hansen
2022-04-19 12:39     ` Thomas Gleixner
2022-04-19 13:33       ` Thomas Gleixner
2022-04-04 12:11 ` [patch 3/3] x86/fpu/xsave: Optimize XSAVEC/S when XGETBV1 is supported Thomas Gleixner
2022-04-14 17:24   ` Dave Hansen
2022-04-19 13:43     ` Thomas Gleixner
2022-04-19 21:22       ` Thomas Gleixner
2022-04-20 18:15         ` Tom Lendacky
2022-04-22 19:30           ` Thomas Gleixner
2022-04-23 15:20             ` Dave Hansen

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