diff for duplicates of <1406732794-20920-3-git-send-email-rric@kernel.org>
diff --git a/a/content_digest b/N1/content_digest
index cbcfc3d..9150bcb 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -21,11 +21,11 @@
" Kumar Gala <galak\@codeaurora.org>\0"
]
[
- "Cc\0linux-kernel\@vger.kernel.org",
- " linux-arm-kernel\@lists.infradead.org",
+ "Cc\0Robert Richter <rrichter\@cavium.com>",
+ " devicetree\@vger.kernel.org",
" Radha Mohan Chintakuntla <rchintakuntla\@cavium.com>",
- " Robert Richter <rrichter\@cavium.com>",
- " devicetree\@vger.kernel.org\0"
+ " linux-kernel\@vger.kernel.org",
+ " linux-arm-kernel\@lists.infradead.org\0"
]
[
"\0000:1\0"
@@ -455,4 +455,4 @@
"2.0.1"
]
-f0f572dcc1e0aec8c8d10277f5583baa750258a2b089e9e87017e631292ee685
+ad9250a5f203f6b94584deb92f7dce725aac1387a7567e5957a22e10227a2374
diff --git a/a/1.txt b/N2/1.txt
index 666d12e..197273f 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -64,289 +64,289 @@ index 000000000000..4cf20ac9138b
+ #address-cells = <2>;
+ #size-cells = <0>;
+
-+ cpu@000 {
++ cpu at 000 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x000>;
+ enable-method = "psci";
+ };
-+ cpu@001 {
++ cpu at 001 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x001>;
+ enable-method = "psci";
+ };
-+ cpu@002 {
++ cpu at 002 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x002>;
+ enable-method = "psci";
+ };
-+ cpu@003 {
++ cpu at 003 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x003>;
+ enable-method = "psci";
+ };
-+ cpu@004 {
++ cpu at 004 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x004>;
+ enable-method = "psci";
+ };
-+ cpu@005 {
++ cpu at 005 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x005>;
+ enable-method = "psci";
+ };
-+ cpu@006 {
++ cpu at 006 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x006>;
+ enable-method = "psci";
+ };
-+ cpu@007 {
++ cpu at 007 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x007>;
+ enable-method = "psci";
+ };
-+ cpu@008 {
++ cpu at 008 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x008>;
+ enable-method = "psci";
+ };
-+ cpu@009 {
++ cpu at 009 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x009>;
+ enable-method = "psci";
+ };
-+ cpu@00a {
++ cpu at 00a {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x00a>;
+ enable-method = "psci";
+ };
-+ cpu@00b {
++ cpu at 00b {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x00b>;
+ enable-method = "psci";
+ };
-+ cpu@00c {
++ cpu at 00c {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x00c>;
+ enable-method = "psci";
+ };
-+ cpu@00d {
++ cpu at 00d {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x00d>;
+ enable-method = "psci";
+ };
-+ cpu@00e {
++ cpu at 00e {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x00e>;
+ enable-method = "psci";
+ };
-+ cpu@00f {
++ cpu at 00f {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x00f>;
+ enable-method = "psci";
+ };
-+ cpu@100 {
++ cpu at 100 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x100>;
+ enable-method = "psci";
+ };
-+ cpu@101 {
++ cpu at 101 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x101>;
+ enable-method = "psci";
+ };
-+ cpu@102 {
++ cpu at 102 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x102>;
+ enable-method = "psci";
+ };
-+ cpu@103 {
++ cpu at 103 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x103>;
+ enable-method = "psci";
+ };
-+ cpu@104 {
++ cpu at 104 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x104>;
+ enable-method = "psci";
+ };
-+ cpu@105 {
++ cpu at 105 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x105>;
+ enable-method = "psci";
+ };
-+ cpu@106 {
++ cpu at 106 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x106>;
+ enable-method = "psci";
+ };
-+ cpu@107 {
++ cpu at 107 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x107>;
+ enable-method = "psci";
+ };
-+ cpu@108 {
++ cpu at 108 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x108>;
+ enable-method = "psci";
+ };
-+ cpu@109 {
++ cpu at 109 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x109>;
+ enable-method = "psci";
+ };
-+ cpu@10a {
++ cpu at 10a {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x10a>;
+ enable-method = "psci";
+ };
-+ cpu@10b {
++ cpu at 10b {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x10b>;
+ enable-method = "psci";
+ };
-+ cpu@10c {
++ cpu at 10c {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x10c>;
+ enable-method = "psci";
+ };
-+ cpu@10d {
++ cpu at 10d {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x10d>;
+ enable-method = "psci";
+ };
-+ cpu@10e {
++ cpu at 10e {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x10e>;
+ enable-method = "psci";
+ };
-+ cpu@10f {
++ cpu at 10f {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x10f>;
+ enable-method = "psci";
+ };
-+ cpu@200 {
++ cpu at 200 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x200>;
+ enable-method = "psci";
+ };
-+ cpu@201 {
++ cpu at 201 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x201>;
+ enable-method = "psci";
+ };
-+ cpu@202 {
++ cpu at 202 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x202>;
+ enable-method = "psci";
+ };
-+ cpu@203 {
++ cpu at 203 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x203>;
+ enable-method = "psci";
+ };
-+ cpu@204 {
++ cpu at 204 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x204>;
+ enable-method = "psci";
+ };
-+ cpu@205 {
++ cpu at 205 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x205>;
+ enable-method = "psci";
+ };
-+ cpu@206 {
++ cpu at 206 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x206>;
+ enable-method = "psci";
+ };
-+ cpu@207 {
++ cpu at 207 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x207>;
+ enable-method = "psci";
+ };
-+ cpu@208 {
++ cpu at 208 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x208>;
+ enable-method = "psci";
+ };
-+ cpu@209 {
++ cpu at 209 {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x209>;
+ enable-method = "psci";
+ };
-+ cpu@20a {
++ cpu at 20a {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x20a>;
+ enable-method = "psci";
+ };
-+ cpu@20b {
++ cpu at 20b {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x20b>;
+ enable-method = "psci";
+ };
-+ cpu@20c {
++ cpu at 20c {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x20c>;
+ enable-method = "psci";
+ };
-+ cpu@20d {
++ cpu at 20d {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x20d>;
+ enable-method = "psci";
+ };
-+ cpu@20e {
++ cpu at 20e {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x20e>;
+ enable-method = "psci";
+ };
-+ cpu@20f {
++ cpu at 20f {
+ device_type = "cpu";
+ compatible = "cavium,thunder", "arm,armv8";
+ reg = <0x0 0x20f>;
@@ -354,12 +354,12 @@ index 000000000000..4cf20ac9138b
+ };
+ };
+
-+ memory@00000000 {
++ memory at 00000000 {
+ device_type = "memory";
+ reg = <0x0 0x00000000 0x0 0x80000000>;
+ };
+
-+ gic0: interrupt-controller@801000000000 {
++ gic0: interrupt-controller at 801000000000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ #address-cells = <2>;
@@ -398,7 +398,7 @@ index 000000000000..4cf20ac9138b
+ };
+ };
+
-+ uaa0: serial@87e024000000 {
++ uaa0: serial at 87e024000000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x87e0 0x24000000 0x0 0x1000>;
+ interrupts = <1 21 4>;
@@ -406,7 +406,7 @@ index 000000000000..4cf20ac9138b
+ clock-names = "apb_pclk";
+ };
+
-+ uaa1: serial@87e025000000 {
++ uaa1: serial at 87e025000000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x87e0 0x25000000 0x0 0x1000>;
+ interrupts = <1 22 4>;
diff --git a/a/content_digest b/N2/content_digest
index cbcfc3d..95f0d8e 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -2,7 +2,7 @@
"ref\0001406732794-20920-1-git-send-email-rric\@kernel.org\0"
]
[
- "From\0Robert Richter <rric\@kernel.org>\0"
+ "From\0rric\@kernel.org (Robert Richter)\0"
]
[
"Subject\0[PATCH 2/5] arm64, thunder: Add initial dts for Cavium Thunder SoC\0"
@@ -11,21 +11,7 @@
"Date\0Wed, 30 Jul 2014 17:06:31 +0200\0"
]
[
- "To\0Catalin Marinas <catalin.marinas\@arm.com>",
- " Will Deacon <will.deacon\@arm.com>",
- " Rob Herring <robh+dt\@kernel.org>",
- " Arnd Bergmann <arnd\@arndb.de>",
- " Pawel Moll <pawel.moll\@arm.com>",
- " Mark Rutland <mark.rutland\@arm.com>",
- " Ian Campbell <ijc+devicetree\@hellion.org.uk>",
- " Kumar Gala <galak\@codeaurora.org>\0"
-]
-[
- "Cc\0linux-kernel\@vger.kernel.org",
- " linux-arm-kernel\@lists.infradead.org",
- " Radha Mohan Chintakuntla <rchintakuntla\@cavium.com>",
- " Robert Richter <rrichter\@cavium.com>",
- " devicetree\@vger.kernel.org\0"
+ "To\0linux-arm-kernel\@lists.infradead.org\0"
]
[
"\0000:1\0"
@@ -100,289 +86,289 @@
"+\t\t#address-cells = <2>;\n",
"+\t\t#size-cells = <0>;\n",
"+\n",
- "+\t\tcpu\@000 {\n",
+ "+\t\tcpu at 000 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x000>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@001 {\n",
+ "+\t\tcpu at 001 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x001>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@002 {\n",
+ "+\t\tcpu at 002 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x002>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@003 {\n",
+ "+\t\tcpu at 003 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x003>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@004 {\n",
+ "+\t\tcpu at 004 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x004>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@005 {\n",
+ "+\t\tcpu at 005 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x005>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@006 {\n",
+ "+\t\tcpu at 006 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x006>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@007 {\n",
+ "+\t\tcpu at 007 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x007>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@008 {\n",
+ "+\t\tcpu at 008 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x008>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@009 {\n",
+ "+\t\tcpu at 009 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x009>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@00a {\n",
+ "+\t\tcpu at 00a {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x00a>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@00b {\n",
+ "+\t\tcpu at 00b {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x00b>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@00c {\n",
+ "+\t\tcpu at 00c {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x00c>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@00d {\n",
+ "+\t\tcpu at 00d {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x00d>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@00e {\n",
+ "+\t\tcpu at 00e {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x00e>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@00f {\n",
+ "+\t\tcpu at 00f {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x00f>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@100 {\n",
+ "+\t\tcpu at 100 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x100>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@101 {\n",
+ "+\t\tcpu at 101 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x101>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@102 {\n",
+ "+\t\tcpu at 102 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x102>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@103 {\n",
+ "+\t\tcpu at 103 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x103>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@104 {\n",
+ "+\t\tcpu at 104 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x104>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@105 {\n",
+ "+\t\tcpu at 105 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x105>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@106 {\n",
+ "+\t\tcpu at 106 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x106>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@107 {\n",
+ "+\t\tcpu at 107 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x107>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@108 {\n",
+ "+\t\tcpu at 108 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x108>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@109 {\n",
+ "+\t\tcpu at 109 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x109>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@10a {\n",
+ "+\t\tcpu at 10a {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x10a>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@10b {\n",
+ "+\t\tcpu at 10b {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x10b>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@10c {\n",
+ "+\t\tcpu at 10c {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x10c>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@10d {\n",
+ "+\t\tcpu at 10d {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x10d>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@10e {\n",
+ "+\t\tcpu at 10e {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x10e>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@10f {\n",
+ "+\t\tcpu at 10f {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x10f>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@200 {\n",
+ "+\t\tcpu at 200 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x200>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@201 {\n",
+ "+\t\tcpu at 201 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x201>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@202 {\n",
+ "+\t\tcpu at 202 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x202>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@203 {\n",
+ "+\t\tcpu at 203 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x203>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@204 {\n",
+ "+\t\tcpu at 204 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x204>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@205 {\n",
+ "+\t\tcpu at 205 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x205>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@206 {\n",
+ "+\t\tcpu at 206 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x206>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@207 {\n",
+ "+\t\tcpu at 207 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x207>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@208 {\n",
+ "+\t\tcpu at 208 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x208>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@209 {\n",
+ "+\t\tcpu at 209 {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x209>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@20a {\n",
+ "+\t\tcpu at 20a {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x20a>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@20b {\n",
+ "+\t\tcpu at 20b {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x20b>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@20c {\n",
+ "+\t\tcpu at 20c {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x20c>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@20d {\n",
+ "+\t\tcpu at 20d {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x20d>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@20e {\n",
+ "+\t\tcpu at 20e {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x20e>;\n",
"+\t\t\tenable-method = \"psci\";\n",
"+\t\t};\n",
- "+\t\tcpu\@20f {\n",
+ "+\t\tcpu at 20f {\n",
"+\t\t\tdevice_type = \"cpu\";\n",
"+\t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n",
"+\t\t\treg = <0x0 0x20f>;\n",
@@ -390,12 +376,12 @@
"+\t\t};\n",
"+\t};\n",
"+\n",
- "+\tmemory\@00000000 {\n",
+ "+\tmemory at 00000000 {\n",
"+\t\tdevice_type = \"memory\";\n",
"+\t\treg = <0x0 0x00000000 0x0 0x80000000>;\n",
"+\t};\n",
"+\n",
- "+\tgic0: interrupt-controller\@801000000000 {\n",
+ "+\tgic0: interrupt-controller at 801000000000 {\n",
"+\t\tcompatible = \"arm,gic-v3\";\n",
"+\t\t#interrupt-cells = <3>;\n",
"+\t\t#address-cells = <2>;\n",
@@ -434,7 +420,7 @@
"+\t\t\t};\n",
"+\t\t};\n",
"+\n",
- "+\t\tuaa0: serial\@87e024000000 {\n",
+ "+\t\tuaa0: serial at 87e024000000 {\n",
"+\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n",
"+\t\t\treg = <0x87e0 0x24000000 0x0 0x1000>;\n",
"+\t\t\tinterrupts = <1 21 4>;\n",
@@ -442,7 +428,7 @@
"+\t\t\tclock-names = \"apb_pclk\";\n",
"+\t\t};\n",
"+\n",
- "+\t\tuaa1: serial\@87e025000000 {\n",
+ "+\t\tuaa1: serial at 87e025000000 {\n",
"+\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n",
"+\t\t\treg = <0x87e0 0x25000000 0x0 0x1000>;\n",
"+\t\t\tinterrupts = <1 22 4>;\n",
@@ -455,4 +441,4 @@
"2.0.1"
]
-f0f572dcc1e0aec8c8d10277f5583baa750258a2b089e9e87017e631292ee685
+c55be628390bfc199816d7132f50549998741c47f78c9f8b59422b86bf4c9a03
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