From: ville.syrjala@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 00/14] drm/i915: VLV/CHV DPLL and DSI stuff
Date: Thu, 3 Sep 2015 21:50:02 +0300 [thread overview]
Message-ID: <1441306216-6581-1-git-send-email-ville.syrjala@linux.intel.com> (raw)
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
As my previous half assed attempt [1] avoiding state checker warnings
for VLV/CHV DSI output shot down during review, I decided to actually
figure out what's the relationship between DSI and the DPLL registers.
Turns out there is one, so this series aims to make things robust by
properly programming the DPLL/DPLL_MD registers when driving DSI
outputs.
I've included the other stragglers from my last DPLL series, mainly
dealing with WaPixelRepeatModeFixForC0.
I also got annoyed by DSI not setting up the panel fitter, so I
plugged that in as well.
Series available at:
git://github.com/vsyrjala/linux.git vlv_chv_dsi_dpll
[1] http://lists.freedesktop.org/archives/intel-gfx/2015-June/070040.html
Ville Syrjälä (14):
drm/i915: Make {vlv,chv}_{disable,update}_pll() more similar
drm/i915: Implement WaPixelRepeatModeFixForC0:chv
drm/i915: Power down the DSI PLL before reconfiguring it
drm/i915: Add a local pipe variable to vlv_enable_pll()
drm/i915: assert_panel_unlocked() in chv_enable_pll()
drm/i915: Remove the "three times for luck" trick from
vlv_enable_pll()
drm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHV
drm/i915: Compute DSI PLL parameters during .compute_config()
drm/i915: Fix CHV DSI PLL refclk during state readout
drm/i915: Change lfsr_converts[] to u16
drm/i915: Throw out BUGs from DPLL/PCH functions
drm/i915: Hook up pfit for DSI
drm/i915: Reject 'Center' scaling mode for eDP/DSI on GMCH platforms
drm/i915: Dump pfit state as hex
drivers/gpu/drm/i915/i915_drv.h | 7 +
drivers/gpu/drm/i915/i915_reg.h | 3 +
drivers/gpu/drm/i915/intel_display.c | 262 ++++++++++++++++++-----------------
drivers/gpu/drm/i915/intel_dp.c | 5 +
drivers/gpu/drm/i915/intel_drv.h | 5 +
drivers/gpu/drm/i915/intel_dsi.c | 112 +++++++++++----
drivers/gpu/drm/i915/intel_dsi.h | 8 +-
drivers/gpu/drm/i915/intel_dsi_pll.c | 60 ++++----
8 files changed, 281 insertions(+), 181 deletions(-)
--
2.4.6
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next reply other threads:[~2015-09-03 18:50 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-03 18:50 ville.syrjala [this message]
2015-09-03 18:50 ` [PATCH v2 01/14] drm/i915: Make {vlv, chv}_{disable, update}_pll() more similar ville.syrjala
2015-09-03 18:50 ` [PATCH 02/14] drm/i915: Implement WaPixelRepeatModeFixForC0:chv ville.syrjala
2015-09-03 18:50 ` [PATCH 03/14] drm/i915: Power down the DSI PLL before reconfiguring it ville.syrjala
2015-09-03 18:50 ` [PATCH 04/14] drm/i915: Add a local pipe variable to vlv_enable_pll() ville.syrjala
2015-09-03 18:50 ` [PATCH 05/14] drm/i915: assert_panel_unlocked() in chv_enable_pll() ville.syrjala
2015-09-03 18:50 ` [PATCH 06/14] drm/i915: Remove the "three times for luck" trick from vlv_enable_pll() ville.syrjala
2015-09-03 18:50 ` [PATCH 07/14] drm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHV ville.syrjala
2015-09-03 18:50 ` [PATCH 08/14] drm/i915: Compute DSI PLL parameters during .compute_config() ville.syrjala
2015-09-03 18:50 ` [PATCH 09/14] drm/i915: Fix CHV DSI PLL refclk during state readout ville.syrjala
2015-09-03 18:50 ` [PATCH 10/14] drm/i915: Change lfsr_converts[] to u16 ville.syrjala
2015-09-03 18:50 ` [PATCH 11/14] drm/i915: Throw out BUGs from DPLL/PCH functions ville.syrjala
2015-09-03 18:50 ` [PATCH 12/14] drm/i915: Hook up pfit for DSI ville.syrjala
2015-09-03 18:50 ` [PATCH 13/14] drm/i915: Reject 'Center' scaling mode for eDP/DSI on GMCH platforms ville.syrjala
2015-09-03 18:50 ` [PATCH 14/14] drm/i915: Dump pfit state as hex ville.syrjala
2015-09-04 8:34 ` Daniel Vetter
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