From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031292AbbKEFTi (ORCPT ); Thu, 5 Nov 2015 00:19:38 -0500 Received: from mail-pa0-f68.google.com ([209.85.220.68]:35870 "EHLO mail-pa0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1030498AbbKEFTe (ORCPT ); Thu, 5 Nov 2015 00:19:34 -0500 From: Caesar Wang To: Heiko Stuebner , Eduardo Valentin Cc: linux-rockchip@lists.infradead.org, Caesar Wang , devicetree@vger.kernel.org, Lorenzo Pieralisi , Kumar Gala , linux-kernel@vger.kernel.org, Ian Campbell , Rob Herring , Pawel Moll , Will Deacon , Mark Rutland , Olof Johansson , Catalin Marinas , linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 8/9] arm64: dts: Add main Thermal info to rk3368.dtsi Date: Thu, 5 Nov 2015 13:18:04 +0800 Message-Id: <1446700685-18017-9-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1446700685-18017-1-git-send-email-wxt@rock-chips.com> References: <1446700685-18017-1-git-send-email-wxt@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch add the thermal needed info on RK3368. Meanwhile, support the trips to throttle for thermal. Signed-off-by: Caesar Wang --- Changes in v2: - fix a copy wrong name. Series-changes: 1 - support the opt gpio pinctrl state Changes in v1: None arch/arm64/boot/dts/rockchip/rk3368.dtsi | 36 ++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index cc093a4..83a2bd2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -45,6 +45,7 @@ #include #include #include +#include / { compatible = "rockchip,rk3368"; @@ -123,6 +124,8 @@ reg = <0x0 0x0>; cpu-idle-states = <&cpu_sleep>; enable-method = "psci"; + + #cooling-cells = <2>; /* min followed by max */ }; cpu_l1: cpu@1 { @@ -155,6 +158,8 @@ reg = <0x0 0x100>; cpu-idle-states = <&cpu_sleep>; enable-method = "psci"; + + #cooling-cells = <2>; /* min followed by max */ }; cpu_b1: cpu@101 { @@ -404,6 +409,27 @@ status = "disabled"; }; + thermal-zones { + #include "rk3368-thermal.dtsi" + }; + + tsadc: tsadc@ff280000 { + compatible = "rockchip,rk3368-tsadc"; + reg = <0x0 0xff280000 0x0 0x100>; + interrupts = ; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + pinctrl-names = "init", "default", "sleep"; + pinctrl-0 = <&otp_gpio>; + pinctrl-1 = <&otp_out>; + pinctrl-2 = <&otp_gpio>; + #thermal-sensor-cells = <1>; + rockchip,hw-tshut-temp = <95000>; + status = "disabled"; + }; + gmac: ethernet@ff290000 { compatible = "rockchip,rk3368-gmac"; reg = <0x0 0xff290000 0x0 0x10000>; @@ -829,6 +855,16 @@ }; }; + tsadc { + otp_gpio: otp-gpio { + rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + otp_out: otp-out { + rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + uart0 { uart0_xfer: uart0-xfer { rockchip,pins = <2 24 RK_FUNC_1 &pcfg_pull_up>, -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: wxt@rock-chips.com (Caesar Wang) Date: Thu, 5 Nov 2015 13:18:04 +0800 Subject: [PATCH v2 8/9] arm64: dts: Add main Thermal info to rk3368.dtsi In-Reply-To: <1446700685-18017-1-git-send-email-wxt@rock-chips.com> References: <1446700685-18017-1-git-send-email-wxt@rock-chips.com> Message-ID: <1446700685-18017-9-git-send-email-wxt@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This patch add the thermal needed info on RK3368. Meanwhile, support the trips to throttle for thermal. Signed-off-by: Caesar Wang --- Changes in v2: - fix a copy wrong name. Series-changes: 1 - support the opt gpio pinctrl state Changes in v1: None arch/arm64/boot/dts/rockchip/rk3368.dtsi | 36 ++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index cc093a4..83a2bd2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -45,6 +45,7 @@ #include #include #include +#include / { compatible = "rockchip,rk3368"; @@ -123,6 +124,8 @@ reg = <0x0 0x0>; cpu-idle-states = <&cpu_sleep>; enable-method = "psci"; + + #cooling-cells = <2>; /* min followed by max */ }; cpu_l1: cpu at 1 { @@ -155,6 +158,8 @@ reg = <0x0 0x100>; cpu-idle-states = <&cpu_sleep>; enable-method = "psci"; + + #cooling-cells = <2>; /* min followed by max */ }; cpu_b1: cpu at 101 { @@ -404,6 +409,27 @@ status = "disabled"; }; + thermal-zones { + #include "rk3368-thermal.dtsi" + }; + + tsadc: tsadc at ff280000 { + compatible = "rockchip,rk3368-tsadc"; + reg = <0x0 0xff280000 0x0 0x100>; + interrupts = ; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + resets = <&cru SRST_TSADC>; + reset-names = "tsadc-apb"; + pinctrl-names = "init", "default", "sleep"; + pinctrl-0 = <&otp_gpio>; + pinctrl-1 = <&otp_out>; + pinctrl-2 = <&otp_gpio>; + #thermal-sensor-cells = <1>; + rockchip,hw-tshut-temp = <95000>; + status = "disabled"; + }; + gmac: ethernet at ff290000 { compatible = "rockchip,rk3368-gmac"; reg = <0x0 0xff290000 0x0 0x10000>; @@ -829,6 +855,16 @@ }; }; + tsadc { + otp_gpio: otp-gpio { + rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + otp_out: otp-out { + rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + uart0 { uart0_xfer: uart0-xfer { rockchip,pins = <2 24 RK_FUNC_1 &pcfg_pull_up>, -- 1.9.1