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From: Imre Deak <imre.deak@intel.com>
To: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 11/12] drm/i915/gen9: Add boot parameter for disabling DC6
Date: Thu, 12 Nov 2015 15:52:33 +0200	[thread overview]
Message-ID: <1447336353.6396.35.camel@intel.com> (raw)
In-Reply-To: <20151112125139.GC30759@patrik-desktop.isw.intel.com>

On to, 2015-11-12 at 13:51 +0100, Patrik Jakobsson wrote:
> On Wed, Nov 11, 2015 at 09:04:09PM +0200, Imre Deak wrote:
> > On ma, 2015-11-09 at 16:48 +0100, Patrik Jakobsson wrote:
> > > v2: Use _unsafe (Jani)
> > > 
> > > Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com
> > > >
> > > ---
> > >  drivers/gpu/drm/i915/i915_drv.h         | 1 +
> > >  drivers/gpu/drm/i915/i915_params.c      | 6 ++++++
> > >  drivers/gpu/drm/i915/intel_runtime_pm.c | 4 ++--
> > >  3 files changed, 9 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > > b/drivers/gpu/drm/i915/i915_drv.h
> > > index c0252ef..5628c5a 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -2639,6 +2639,7 @@ struct i915_params {
> > >  	int panel_use_ssc;
> > >  	int vbt_sdvo_panel_type;
> > >  	int enable_rc6;
> > > +	int enable_dc6;
> > >  	int enable_fbc;
> > >  	int enable_ppgtt;
> > >  	int enable_execlists;
> > > diff --git a/drivers/gpu/drm/i915/i915_params.c
> > > b/drivers/gpu/drm/i915/i915_params.c
> > > index 368df67..6457f3a 100644
> > > --- a/drivers/gpu/drm/i915/i915_params.c
> > > +++ b/drivers/gpu/drm/i915/i915_params.c
> > > @@ -32,6 +32,7 @@ struct i915_params i915 __read_mostly = {
> > >  	.panel_use_ssc = -1,
> > >  	.vbt_sdvo_panel_type = -1,
> > >  	.enable_rc6 = -1,
> > > +	.enable_dc6 = 1,
> > >  	.enable_fbc = -1,
> > >  	.enable_execlists = -1,
> > >  	.enable_hangcheck = true,
> > > @@ -79,6 +80,11 @@ MODULE_PARM_DESC(enable_rc6,
> > >  	"For example, 3 would enable rc6 and deep rc6, and 7
> > > would
> > > enable everything. "
> > >  	"default: -1 (use per-chip default)");
> > >  
> > > +module_param_named_unsafe(enable_dc6, i915.enable_dc6, int,
> > > 0400);
> > > +MODULE_PARM_DESC(enable_dc6,
> > > +	"Enable power-saving display C-state 6. "
> > > +	"(0 = disable; 1 = enable [default])");
> > > +
> > 
> > It would be more generic to have something like enable_dc, -1=per
> > -chip
> > default, 0=disable, 1=up to dc5, 2=up to dc6.
> 
> I'm not sure if this parameter is going to stay for long but if it
> does I
> suppose we should have DC9 as well.

Yea, we could extend this in case we make DC9 a power well.

> But do we really need this level of control?
> My intention was to work around the DC6 corner case. Do you think
> we could make good use of a more generic interface?

This is an experimental functionality and have device wide effects (at
least display wide), so I wouldn't be surprised if we can make a good
use of a more fine grained control here.

> Perhaps useful for testing? If so, I
> definitely think we should go with your more generic solution.
> Otherwise I'd
> rather keep it simple. Feel free to override my decision here.
> 
> Also, what would 0=disable be? Not starting the DMC at all or DC3/4?

Just not enabling DC5/6 ever in gen9_dc_off_power_well_disable(). The
idea would be to test if some failure is caused by DC5 for example.

> >  module_param_named_unsafe(enable_fbc, i915.enable_fbc, int, 0600);
> > >  MODULE_PARM_DESC(enable_fbc,
> > >  	"Enable frame buffer compression for power savings "
> > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > index 95c3fcc..62c1273 100644
> > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > @@ -708,7 +708,7 @@ static void
> > > gen9_dc_off_power_well_enable(struct
> > > drm_i915_private *dev_priv,
> > >  static void gen9_dc_off_power_well_disable(struct
> > > drm_i915_private
> > > *dev_priv,
> > >  					  struct i915_power_well
> > > *power_well)
> > >  {
> > > -	if (IS_SKYLAKE(dev_priv))
> > > +	if (IS_SKYLAKE(dev_priv) && i915.enable_dc6)
> > >  		skl_enable_dc6(dev_priv);
> > >  	else
> > >  		gen9_enable_dc5(dev_priv);
> > > @@ -720,7 +720,7 @@ static void
> > > gen9_dc_off_power_well_sync_hw(struct
> > > drm_i915_private *dev_priv,
> > >  	if (power_well->count > 0) {
> > >  		gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
> > >  	} else {
> > > -		if (IS_SKYLAKE(dev_priv))
> > > +		if (IS_SKYLAKE(dev_priv) && i915.enable_dc6)
> > >  			gen9_set_dc_state(dev_priv,
> > > DC_STATE_EN_UPTO_DC6);
> > >  		else
> > >  			gen9_set_dc_state(dev_priv,
> > > DC_STATE_EN_UPTO_DC5);
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  reply	other threads:[~2015-11-12 13:52 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-09 15:48 [PATCH v2 00/12] Skylake DMC/DC-state fixes and redesign Patrik Jakobsson
2015-11-09 15:48 ` [PATCH 01/12] drm/i915: Don't trust CSR program memory contents Patrik Jakobsson
2015-11-11 19:05   ` Imre Deak
2015-11-09 15:48 ` [PATCH 02/12] drm/i915/gen9: Always set mask memory up when enabling DC5 or DC6 Patrik Jakobsson
2015-11-11 19:08   ` Imre Deak
2015-11-09 15:48 ` [PATCH 03/12] drm/i915: Clean up AUX power domain handling Patrik Jakobsson
2015-11-11 18:22   ` Imre Deak
2015-11-11 18:37     ` Ville Syrjälä
2015-11-12  9:02       ` Patrik Jakobsson
2015-11-12 10:15         ` Ville Syrjälä
2015-11-16 14:01   ` [PATCH v2 " Patrik Jakobsson
2015-11-09 15:48 ` [PATCH 04/12] drm/i915: Introduce a gmbus power domain Patrik Jakobsson
2015-11-09 15:48 ` [PATCH 05/12] drm/i915: Remove DDI power domain exclusion SKL_DISPLAY_ALWAYS_ON_POWER_DOMAINS Patrik Jakobsson
2015-11-09 15:48 ` [PATCH 06/12] drm/i915: Remove distinction between DDI 2 vs 4 lanes Patrik Jakobsson
2015-11-11 19:10   ` Imre Deak
2015-11-09 15:48 ` [PATCH 07/12] drm/i915: Add a modeset power domain Patrik Jakobsson
2015-11-11 19:11   ` Imre Deak
2015-11-09 15:48 ` [PATCH 08/12] drm/i915: Do not warn on PG2 enabled in gen9_disable_dc5() Patrik Jakobsson
2015-11-09 15:48 ` [PATCH 09/12] drm/i915: Explain usage of power well IDs vs bit groups Patrik Jakobsson
2015-11-11 19:13   ` Imre Deak
2015-11-12 13:15     ` Patrik Jakobsson
2015-11-16 14:01   ` [PATCH v2 " Patrik Jakobsson
2015-11-09 15:48 ` [PATCH v2 10/12] drm/i915/gen9: Turn DC handling into a power well Patrik Jakobsson
2015-11-11 18:57   ` Imre Deak
2015-11-12 12:24     ` Patrik Jakobsson
2015-11-12 13:30       ` Imre Deak
2015-11-13 17:53         ` Imre Deak
2015-11-11 19:23   ` Imre Deak
2015-11-12 12:55     ` Patrik Jakobsson
2015-11-16 14:01   ` [PATCH v3 " Patrik Jakobsson
2015-11-16 14:41     ` Patrik Jakobsson
2015-11-16 15:20     ` [PATCH v4 " Patrik Jakobsson
2015-11-17 19:21       ` Imre Deak
2015-11-23 22:58       ` Matt Roper
2015-11-23 23:09         ` Imre Deak
2015-11-24 12:24           ` Daniel Vetter
2015-11-16 19:28     ` [PATCH v3 " Imre Deak
2015-11-16 19:46       ` Patrik Jakobsson
2015-11-09 15:48 ` [PATCH v2 11/12] drm/i915/gen9: Add boot parameter for disabling DC6 Patrik Jakobsson
2015-11-11 19:04   ` Imre Deak
2015-11-12 12:51     ` Patrik Jakobsson
2015-11-12 13:52       ` Imre Deak [this message]
2015-11-16 14:01   ` [PATCH v3 " Patrik Jakobsson
2015-11-16 19:25     ` Imre Deak
2015-11-09 15:48 ` [PATCH 12/12] drm/i915/skl: Remove unused suspend and resume callbacks Patrik Jakobsson
2015-11-17 18:28   ` Imre Deak
2015-11-17 19:54 ` [PATCH v2 00/12] Skylake DMC/DC-state fixes and redesign Imre Deak

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