From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58088) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZwtVO-00083i-VZ for qemu-devel@nongnu.org; Thu, 12 Nov 2015 10:09:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZwtVI-00083Y-Tb for qemu-devel@nongnu.org; Thu, 12 Nov 2015 10:09:42 -0500 Received: from mx1.redhat.com ([209.132.183.28]:59647) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZwtVI-00083T-Lu for qemu-devel@nongnu.org; Thu, 12 Nov 2015 10:09:36 -0500 Date: Thu, 12 Nov 2015 17:09:34 +0200 From: "Michael S. Tsirkin" Message-ID: <1447340097-18216-11-git-send-email-mst@redhat.com> References: <1447340097-18216-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1447340097-18216-1-git-send-email-mst@redhat.com> Subject: [Qemu-devel] [PULL 10/11] hw/virtio: Add PCIe capability to virtio devices List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Marcel Apfelbaum , Peter Maydell From: Marcel Apfelbaum The virtio devices are converted to PCI-Express if they are plugged into a PCI-Express bus and the 'modern' protocol is enabled. Devices plugged directly into the Root Complex as Integrated Endpoints remain PCI. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/virtio/virtio-pci.h | 2 ++ include/hw/compat.h | 4 ++++ hw/virtio/virtio-pci.c | 22 ++++++++++++++++++++++ 3 files changed, 28 insertions(+) diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h index 460c3c9..ffb74bb 100644 --- a/hw/virtio/virtio-pci.h +++ b/hw/virtio/virtio-pci.h @@ -72,8 +72,10 @@ typedef struct VirtioBusClass VirtioPCIBusClass; /* virtio version flags */ #define VIRTIO_PCI_FLAG_DISABLE_LEGACY_BIT 2 #define VIRTIO_PCI_FLAG_DISABLE_MODERN_BIT 3 +#define VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT 4 #define VIRTIO_PCI_FLAG_DISABLE_LEGACY (1 << VIRTIO_PCI_FLAG_DISABLE_LEGACY_BIT) #define VIRTIO_PCI_FLAG_DISABLE_MODERN (1 << VIRTIO_PCI_FLAG_DISABLE_MODERN_BIT) +#define VIRTIO_PCI_FLAG_DISABLE_PCIE (1 << VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT) /* migrate extra state */ #define VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT 4 diff --git a/include/hw/compat.h b/include/hw/compat.h index 65799c1..845aace 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -8,6 +8,10 @@ .value = "true",\ },{\ .driver = "virtio-pci",\ + .property = "x-disable-pcie",\ + .value = "on",\ + },{\ + .driver = "virtio-pci",\ .property = "migrate-extra",\ .value = "off",\ }, diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 52a9e33..dd48562 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1814,6 +1814,26 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) address_space_init(&proxy->modern_as, &proxy->modern_cfg, "virtio-pci-cfg-as"); + if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) + && !(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_MODERN) + && pci_bus_is_express(pci_dev->bus) + && !pci_bus_is_root(pci_dev->bus)) { + int pos; + + pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; + pos = pcie_endpoint_cap_init(pci_dev, 0); + assert(pos > 0); + + pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF); + assert(pos > 0); + + /* + * Indicates that this function complies with revision 1.2 of the + * PCI Power Management Interface Specification. + */ + pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3); + } + virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy); if (k->realize) { k->realize(proxy, errp); @@ -1854,6 +1874,8 @@ static Property virtio_pci_properties[] = { VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true), DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false), + DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags, + VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false), DEFINE_PROP_END_OF_LIST(), }; -- MST