[PATCH v5 1/2] drm/i915: Disable fast link training if DP config changes

[Mika Kahola <mika.kahola@intel.com>]

Disable DP link training optimization if DP link configuration
changes. If one of the DP link parameters i.e. link rate or
lane count changes the link training does no longer apply the
previously computed drive current and pre-emphasis level.
Instead, the link training is started with zero values.

v5: Commit message update. Split the original patch in two.
    This part considers only changes on link configuration.
    Removed unnecessary debug messages. (Ville)

v4: Parameter and debug message naming improvements.
    Fix for link parameter check (Ville)

v3: Remove cached old link parameters. Instead, disable
    fast link training feature when link parameters are
    set (Ville)

v2: Readout DPCD register to check if no aux handshaking is
    required in link training (Ander)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91393
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c               | 5 +++++
 drivers/gpu/drm/i915/intel_dp_link_training.c | 3 +++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 796e3d3..6b36d82 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1676,6 +1676,11 @@ found:
 void intel_dp_set_link_params(struct intel_dp *intel_dp,
 			      const struct intel_crtc_state *pipe_config)
 {
+	if (intel_dp->link_rate != pipe_config->port_clock ||
+	    intel_dp->lane_count != pipe_config->lane_count) {
+		intel_dp->train_set_valid = false;
+	}
+
 	intel_dp->link_rate = pipe_config->port_clock;
 	intel_dp->lane_count = pipe_config->lane_count;
 }
diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c b/drivers/gpu/drm/i915/intel_dp_link_training.c
index 8888793..59d59be 100644
--- a/drivers/gpu/drm/i915/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/intel_dp_link_training.c
@@ -85,6 +85,9 @@ static bool
 intel_dp_reset_link_train(struct intel_dp *intel_dp,
 			uint8_t dp_train_pat)
 {
+	DRM_DEBUG_KMS("link training optimization: %s\n",
+		      intel_dp->train_set_valid ? "true" : "false");
+
 	if (!intel_dp->train_set_valid)
 		memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
 	intel_dp_set_signal_levels(intel_dp);
-- 
1.9.1

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