From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756374AbcBCLdK (ORCPT ); Wed, 3 Feb 2016 06:33:10 -0500 Received: from mailapp01.imgtec.com ([195.59.15.196]:37776 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755223AbcBCLdG (ORCPT ); Wed, 3 Feb 2016 06:33:06 -0500 From: Paul Burton To: , Ralf Baechle CC: Paul Burton , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= , Michal Simek , "Jiang Liu" , Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas , , Russell Joyce , , Thomas Gleixner , Jingoo Han , Subject: [PATCH v2 08/15] PCI: xilinx: Fix INTX irq dispatch Date: Wed, 3 Feb 2016 11:30:38 +0000 Message-ID: <1454499045-5020-9-git-send-email-paul.burton@imgtec.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1454499045-5020-1-git-send-email-paul.burton@imgtec.com> References: <1454499045-5020-1-git-send-email-paul.burton@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.100.200.105] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The IRQ domain for INTX interrupts has 4 entries, numbered 0 to 3. This matches what the hardware reports from the interrupt FIFO exactly, but xilinx_pcie_intr_handler was adding 1 to that value to convert to the range 1 to 4. Stop adding 1, such that all of INTA through to INTD fall within the range of the IRQ domain. Signed-off-by: Paul Burton Fixes: 8961def56845 ("PCI: xilinx: Add Xilinx AXI PCIe Host Bridge IP driver") --- Changes in v2: - Add Fixes tag. drivers/pci/host/pcie-xilinx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c index 6c5a503..8013e83 100644 --- a/drivers/pci/host/pcie-xilinx.c +++ b/drivers/pci/host/pcie-xilinx.c @@ -451,8 +451,8 @@ static irqreturn_t xilinx_pcie_intr_handler(int irq, void *data) irq = pcie_read(port, XILINX_PCIE_REG_RPIFR2) & XILINX_PCIE_RPIFR2_MSG_DATA; } else { - val = ((val & XILINX_PCIE_RPIFR1_INTR_MASK) >> - XILINX_PCIE_RPIFR1_INTR_SHIFT) + 1; + val = (val & XILINX_PCIE_RPIFR1_INTR_MASK) >> + XILINX_PCIE_RPIFR1_INTR_SHIFT; irq = irq_find_mapping(port->irq_domain, val); } -- 2.7.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailapp01.imgtec.com ([195.59.15.196]:27047 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27012172AbcBCLdLKp6bM (ORCPT ); Wed, 3 Feb 2016 12:33:11 +0100 From: Paul Burton Subject: [PATCH v2 08/15] PCI: xilinx: Fix INTX irq dispatch Date: Wed, 3 Feb 2016 11:30:38 +0000 Message-ID: <1454499045-5020-9-git-send-email-paul.burton@imgtec.com> In-Reply-To: <1454499045-5020-1-git-send-email-paul.burton@imgtec.com> References: <1454499045-5020-1-git-send-email-paul.burton@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain Return-Path: Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-subscribe: List-owner: List-post: List-archive: To: linux-mips@linux-mips.org, Ralf Baechle Cc: Paul Burton , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= , Michal Simek , Jiang Liu , Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, Russell Joyce , linux-kernel@vger.kernel.org, Thomas Gleixner , Jingoo Han , linux-arm-kernel@lists.infradead.org Message-ID: <20160203113038.ikzNIW1WmF0PnLsNlcHiMDAogvx45jVC9rGXXeLgsz0@z> The IRQ domain for INTX interrupts has 4 entries, numbered 0 to 3. This matches what the hardware reports from the interrupt FIFO exactly, but xilinx_pcie_intr_handler was adding 1 to that value to convert to the range 1 to 4. Stop adding 1, such that all of INTA through to INTD fall within the range of the IRQ domain. Signed-off-by: Paul Burton Fixes: 8961def56845 ("PCI: xilinx: Add Xilinx AXI PCIe Host Bridge IP driver") --- Changes in v2: - Add Fixes tag. drivers/pci/host/pcie-xilinx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c index 6c5a503..8013e83 100644 --- a/drivers/pci/host/pcie-xilinx.c +++ b/drivers/pci/host/pcie-xilinx.c @@ -451,8 +451,8 @@ static irqreturn_t xilinx_pcie_intr_handler(int irq, void *data) irq = pcie_read(port, XILINX_PCIE_REG_RPIFR2) & XILINX_PCIE_RPIFR2_MSG_DATA; } else { - val = ((val & XILINX_PCIE_RPIFR1_INTR_MASK) >> - XILINX_PCIE_RPIFR1_INTR_SHIFT) + 1; + val = (val & XILINX_PCIE_RPIFR1_INTR_MASK) >> + XILINX_PCIE_RPIFR1_INTR_SHIFT; irq = irq_find_mapping(port->irq_domain, val); } -- 2.7.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: paul.burton@imgtec.com (Paul Burton) Date: Wed, 3 Feb 2016 11:30:38 +0000 Subject: [PATCH v2 08/15] PCI: xilinx: Fix INTX irq dispatch In-Reply-To: <1454499045-5020-1-git-send-email-paul.burton@imgtec.com> References: <1454499045-5020-1-git-send-email-paul.burton@imgtec.com> Message-ID: <1454499045-5020-9-git-send-email-paul.burton@imgtec.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org The IRQ domain for INTX interrupts has 4 entries, numbered 0 to 3. This matches what the hardware reports from the interrupt FIFO exactly, but xilinx_pcie_intr_handler was adding 1 to that value to convert to the range 1 to 4. Stop adding 1, such that all of INTA through to INTD fall within the range of the IRQ domain. Signed-off-by: Paul Burton Fixes: 8961def56845 ("PCI: xilinx: Add Xilinx AXI PCIe Host Bridge IP driver") --- Changes in v2: - Add Fixes tag. drivers/pci/host/pcie-xilinx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c index 6c5a503..8013e83 100644 --- a/drivers/pci/host/pcie-xilinx.c +++ b/drivers/pci/host/pcie-xilinx.c @@ -451,8 +451,8 @@ static irqreturn_t xilinx_pcie_intr_handler(int irq, void *data) irq = pcie_read(port, XILINX_PCIE_REG_RPIFR2) & XILINX_PCIE_RPIFR2_MSG_DATA; } else { - val = ((val & XILINX_PCIE_RPIFR1_INTR_MASK) >> - XILINX_PCIE_RPIFR1_INTR_SHIFT) + 1; + val = (val & XILINX_PCIE_RPIFR1_INTR_MASK) >> + XILINX_PCIE_RPIFR1_INTR_SHIFT; irq = irq_find_mapping(port->irq_domain, val); } -- 2.7.0