From mboxrd@z Thu Jan 1 00:00:00 1970 From: Philipp Tomsich Date: Tue, 28 Mar 2017 10:58:37 +0200 Subject: [U-Boot] [PATCH 8/8] dts: rk3399-puma: enable spi1 and spi5, add /spi1/spiflash In-Reply-To: <1490691517-9291-1-git-send-email-philipp.tomsich@theobroma-systems.com> References: <1490691517-9291-1-git-send-email-philipp.tomsich@theobroma-systems.com> Message-ID: <1490691517-9291-9-git-send-email-philipp.tomsich@theobroma-systems.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Jakob Unterwurzacher The RK3399-Q7 (Puma) unsually (this is a build-time option for customised boards) has an on-module SPI-flash connected to SPI1. As of today, this is a Winbond W25Q32DW (32MBit) device. The SPI5 controller is routed to the Q7 edge connector and provides general-purpose SPI connectivity for customer base-boards. With some minor improvements on integration into our outbound tree - explicitly modelled the SPI flash as 'spiflash' under spi0 [dts: rk3399-puma: explicitly model spi-flash under spi1] - renamed the aliases to spi0 and spi1 to allow easier use of commands and legacy (SPL) infrastructure... i.e. the controllers will be 0 and 1 for 'sf probe', 'sspi', etc. [dts: rk3399-puma: rename aliases to number spi as 0 and 1 for commands] X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich Tested-by: Jakob Unterwurzacher --- arch/arm/dts/rk3399-puma.dts | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts index 4f68451..dc00bd9 100644 --- a/arch/arm/dts/rk3399-puma.dts +++ b/arch/arm/dts/rk3399-puma.dts @@ -18,6 +18,11 @@ u-boot,spl-boot-order = &sdhci, "mmc1"; }; + aliases { + spi0 = &spi1; + spi1 = &spi5; + }; + vdd_center: vdd-center { compatible = "pwm-regulator"; pwms = <&pwm3 0 25000 0>; @@ -159,3 +164,24 @@ rx_delay = <0x10>; status = "okay"; }; + +&spi1 { + u-boot,dm-pre-reloc; + + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + spiflash: w25q32dw at 0 { + compatible = "spi-flash"; + reg = <0>; + spi-max-frequency = <5000000>; + spi-cpol; + spi-cpha; + }; +}; + +&spi5 { + status = "okay"; +}; -- 1.9.1