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From: Andre Przywara <andre.przywara@arm.com>
To: Stefano Stabellini <sstabellini@kernel.org>,
	Julien Grall <julien.grall@arm.com>
Cc: xen-devel@lists.xenproject.org,
	Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>,
	Vijay Kilari <vijay.kilari@gmail.com>,
	Shanker Donthineni <shankerd@codeaurora.org>
Subject: [PATCH v8 26/27] ARM: vITS: create and initialize virtual ITSes for Dom0
Date: Wed, 12 Apr 2017 01:44:33 +0100	[thread overview]
Message-ID: <1491957874-31600-27-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1491957874-31600-1-git-send-email-andre.przywara@arm.com>

For each hardware ITS create and initialize a virtual ITS for Dom0.
We use the same memory mapped address to keep the doorbell working.
This introduces a function to initialize a virtual ITS.
We maintain a list of virtual ITSes, at the moment for the only
purpose of later being able to free them again.
We configure the virtual ITSes to match the hardware ones, that is we
keep the number of device ID bits and event ID bits the same as the host
ITS.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 xen/arch/arm/vgic-v3-its.c       | 74 ++++++++++++++++++++++++++++++++++++++++
 xen/arch/arm/vgic-v3.c           |  4 +++
 xen/include/asm-arm/domain.h     |  1 +
 xen/include/asm-arm/gic_v3_its.h |  4 +++
 4 files changed, 83 insertions(+)

diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c
index 1622e53..956b59c 100644
--- a/xen/arch/arm/vgic-v3-its.c
+++ b/xen/arch/arm/vgic-v3-its.c
@@ -52,6 +52,7 @@
  */
 struct virt_its {
     struct domain *d;
+    struct list_head vits_list;
     paddr_t doorbell_address;
     unsigned int devid_bits;
     unsigned int evid_bits;
@@ -100,14 +101,49 @@ unsigned int vgic_v3_its_count(const struct domain *d)
 
 int vgic_v3_its_init_domain(struct domain *d)
 {
+    int ret;
+
+    INIT_LIST_HEAD(&d->arch.vgic.vits_list);
     spin_lock_init(&d->arch.vgic.its_devices_lock);
     d->arch.vgic.its_devices = RB_ROOT;
 
+    if ( is_hardware_domain(d) )
+    {
+        struct host_its *hw_its;
+
+        list_for_each_entry(hw_its, &host_its_list, entry)
+        {
+            /*
+             * For each host ITS create a virtual ITS using the same
+             * base and thus doorbell address.
+             * Use the same number of device ID and event ID bits as the host.
+             */
+            ret = vgic_v3_its_init_virtual(d, hw_its->addr,
+                                           hw_its->devid_bits,
+                                           hw_its->evid_bits);
+            if ( ret )
+            {
+                vgic_v3_its_free_domain(d);
+                return ret;
+            }
+            else
+                d->arch.vgic.has_its = true;
+        }
+    }
+
     return 0;
 }
 
 void vgic_v3_its_free_domain(struct domain *d)
 {
+    struct virt_its *pos, *temp;
+
+    list_for_each_entry_safe( pos, temp, &d->arch.vgic.vits_list, vits_list )
+    {
+        list_del(&pos->vits_list);
+        xfree(pos);
+    }
+
     ASSERT(RB_EMPTY_ROOT(&d->arch.vgic.its_devices));
 }
 
@@ -1377,6 +1413,44 @@ static const struct mmio_handler_ops vgic_its_mmio_handler = {
     .write = vgic_v3_its_mmio_write,
 };
 
+int vgic_v3_its_init_virtual(struct domain *d, paddr_t guest_addr,
+                             unsigned int devid_bits, unsigned int evid_bits)
+{
+    struct virt_its *its;
+    uint64_t base_attr;
+
+    its = xzalloc(struct virt_its);
+    if ( !its )
+        return -ENOMEM;
+
+    base_attr  = GIC_BASER_InnerShareable << GITS_BASER_SHAREABILITY_SHIFT;
+    base_attr |= GIC_BASER_CACHE_SameAsInner << GITS_BASER_OUTER_CACHEABILITY_SHIFT;
+    base_attr |= GIC_BASER_CACHE_RaWaWb << GITS_BASER_INNER_CACHEABILITY_SHIFT;
+
+    its->cbaser  = base_attr;
+    base_attr |= 0ULL << GITS_BASER_PAGE_SIZE_SHIFT;    /* 4K pages */
+    its->baser_dev = GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT;
+    its->baser_dev |= (DEV_TABLE_ENTRY_SIZE - 1) << GITS_BASER_ENTRY_SIZE_SHIFT;
+    its->baser_dev |= base_attr;
+    its->baser_coll  = GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT;
+    its->baser_coll |= (COLL_TABLE_ENTRY_SIZE - 1) <<
+                        GITS_BASER_ENTRY_SIZE_SHIFT;
+    its->baser_coll |= base_attr;
+    its->d = d;
+    its->doorbell_address = guest_addr + ITS_DOORBELL_OFFSET;
+    its->devid_bits = devid_bits;
+    its->evid_bits = evid_bits;
+    spin_lock_init(&its->vcmd_lock);
+    spin_lock_init(&its->its_lock);
+
+    register_mmio_handler(d, &vgic_its_mmio_handler, guest_addr, SZ_64K, its);
+
+    /* Register the virtual ITSes to be able to clean them up later. */
+    list_add_tail(&its->vits_list, &d->arch.vgic.vits_list);
+
+    return 0;
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index e8ed658..e576e31 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -1695,6 +1695,10 @@ static int vgic_v3_domain_init(struct domain *d)
         d->arch.vgic.rdist_regions[0].first_cpu = 0;
     }
 
+    /*
+     * For a hardware domain, this will iterate over the host ITSes
+     * and maps  one virtual ITS per host ITS at the same address.
+     */
     ret = vgic_v3_its_init_domain(d);
     if ( ret )
         return ret;
diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
index b2d98bb..92f4ce5 100644
--- a/xen/include/asm-arm/domain.h
+++ b/xen/include/asm-arm/domain.h
@@ -115,6 +115,7 @@ struct arch_domain
         spinlock_t its_devices_lock;        /* Protects the its_devices tree */
         struct radix_tree_root pend_lpi_tree; /* Stores struct pending_irq's */
         rwlock_t pend_lpi_tree_lock;        /* Protects the pend_lpi_tree */
+        struct list_head vits_list;         /* List of virtual ITSes */
         unsigned int intid_bits;
         bool rdists_enabled;                /* Is any redistributor enabled? */
         bool has_its;
diff --git a/xen/include/asm-arm/gic_v3_its.h b/xen/include/asm-arm/gic_v3_its.h
index ae79d5c..dbae6ee 100644
--- a/xen/include/asm-arm/gic_v3_its.h
+++ b/xen/include/asm-arm/gic_v3_its.h
@@ -158,6 +158,10 @@ int gicv3_its_setup_collection(unsigned int cpu);
 int vgic_v3_its_init_domain(struct domain *d);
 void vgic_v3_its_free_domain(struct domain *d);
 
+/* Create and register a virtual ITS at the given guest address. */
+int vgic_v3_its_init_virtual(struct domain *d, paddr_t guest_addr,
+			     unsigned int devid_bits, unsigned int evid_bits);
+
 /*
  * Map a device on the host by allocating an ITT on the host (ITS).
  * "nr_event" specifies how many events (interrupts) this device will need.
-- 
2.8.2


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  parent reply	other threads:[~2017-04-12  0:46 UTC|newest]

Thread overview: 82+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-12  0:44 [PATCH v8 00/27] arm64: Dom0 ITS emulation Andre Przywara
2017-04-12  0:44 ` [PATCH v8 01/27] ARM: GICv3: propagate number of host LPIs to GICv3 guest Andre Przywara
2017-04-12 10:06   ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 02/27] ARM: VGIC: move irq_to_pending() calls under the VGIC VCPU lock Andre Przywara
2017-04-12 10:13   ` Julien Grall
2017-04-12 11:38     ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 03/27] ARM: GIC: Add checks for NULL pointer pending_irq's Andre Przywara
2017-04-12 10:25   ` Julien Grall
2017-04-12 14:51     ` Andre Przywara
2017-04-12 14:52       ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 04/27] ARM: GICv3: introduce separate pending_irq structs for LPIs Andre Przywara
2017-04-12 10:35   ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 05/27] ARM: GICv3: forward pending LPIs to guests Andre Przywara
2017-04-12 10:44   ` Julien Grall
2017-04-12 17:26     ` Andre Przywara
2017-05-10 10:47     ` Andre Przywara
2017-05-10 11:07       ` Julien Grall
2017-05-10 17:14         ` Andre Przywara
2017-05-10 17:17           ` Julien Grall
2017-05-11 17:55             ` Andre Przywara
2017-04-12  0:44 ` [PATCH v8 06/27] ARM: GICv3: enable ITS and LPIs on the host Andre Przywara
2017-04-12  0:44 ` [PATCH v8 07/27] ARM: vGICv3: handle virtual LPI pending and property tables Andre Przywara
2017-04-12 10:55   ` Julien Grall
2017-04-12 13:12     ` Andre Przywara
2017-04-12 13:13       ` Julien Grall
2017-05-11 17:54         ` Andre Przywara
2017-04-12  0:44 ` [PATCH v8 08/27] ARM: introduce vgic_access_guest_memory() Andre Przywara
2017-04-12 12:29   ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 09/27] ARM: vGICv3: re-use vgic_reg64_check_access Andre Przywara
2017-04-12  0:44 ` [PATCH v8 10/27] ARM: GIC: export vgic_init_pending_irq() Andre Przywara
2017-04-12  0:44 ` [PATCH v8 11/27] ARM: VGIC: add vcpu_id to struct pending_irq Andre Przywara
2017-04-12 12:32   ` Julien Grall
2017-04-12 12:37     ` Andre Przywara
2017-04-12  0:44 ` [PATCH v8 12/27] ARM: vGIC: advertise LPI support Andre Przywara
2017-04-12 12:38   ` Julien Grall
2017-04-12 12:48     ` Andre Przywara
2017-04-12 13:04       ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 13/27] ARM: vITS: add command handling stub and MMIO emulation Andre Przywara
2017-04-12 12:59   ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 14/27] ARM: vITS: introduce translation table walks Andre Przywara
2017-04-12 13:22   ` Julien Grall
2017-04-12 13:36     ` Andre Przywara
2017-04-12 13:37       ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 15/27] ARM: vITS: handle CLEAR command Andre Przywara
2017-04-12 14:10   ` Julien Grall
2017-04-12 14:29     ` Andre Przywara
2017-04-12 14:49       ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 16/27] ARM: vITS: handle INT command Andre Przywara
2017-04-12 14:50   ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 17/27] ARM: vITS: handle MAPC command Andre Przywara
2017-04-12 14:51   ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 18/27] ARM: vITS: handle MAPD command Andre Przywara
2017-04-12 15:21   ` Julien Grall
2017-04-12 17:03     ` Andre Przywara
2017-04-12 17:05       ` Julien Grall
2017-04-12 17:24         ` Andrew Cooper
2017-04-12 18:18           ` Wei Liu
2017-05-10 10:42         ` Andre Przywara
2017-05-10 11:30           ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 19/27] ARM: vITS: handle MAPTI command Andre Przywara
2017-04-12 16:18   ` Julien Grall
2017-04-12 16:27     ` Andre Przywara
2017-04-12 17:16   ` Julien Grall
2017-04-12 17:25   ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 20/27] ARM: GICv3: handle unmapped LPIs Andre Przywara
2017-04-12  9:46   ` Andre Przywara
2017-04-12 16:49   ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 21/27] ARM: vITS: handle MOVI command Andre Przywara
2017-04-12 16:59   ` Julien Grall
2017-05-10 10:34     ` Andre Przywara
2017-04-12  0:44 ` [PATCH v8 22/27] ARM: vITS: handle DISCARD command Andre Przywara
2017-04-12 17:06   ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 23/27] ARM: vITS: handle INV command Andre Przywara
2017-04-12 17:20   ` Julien Grall
2017-05-10 15:11     ` Andre Przywara
2017-05-11 10:43       ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 24/27] ARM: vITS: handle INVALL command Andre Przywara
2017-04-12 17:26   ` Julien Grall
2017-04-12  0:44 ` [PATCH v8 25/27] ARM: vITS: increase mmio_count for each ITS Andre Przywara
2017-04-12  0:44 ` Andre Przywara [this message]
2017-04-12  0:44 ` [PATCH v8 27/27] ARM: vITS: create ITS subnodes for Dom0 DT Andre Przywara
2017-04-12 14:13 ` [PATCH v8 00/27] arm64: Dom0 ITS emulation Julien Grall

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