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From: Yuti Amonkar <yamonkar@cadence.com>
To: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<kishon@ti.com>, <robh+dt@kernel.org>, <mark.rutland@arm.com>
Cc: <jsarha@ti.com>, <tomi.valkeinen@ti.com>, <praneeth@ti.com>,
	<mparab@cadence.com>, <sjakhade@cadence.com>,
	<yamonkar@cadence.com>
Subject: [RESEND PATCH v1 10/15] phy: cadence-torrent: Add PHY lane reset support
Date: Wed, 11 Dec 2019 14:09:15 +0100	[thread overview]
Message-ID: <1576069760-11473-11-git-send-email-yamonkar@cadence.com> (raw)
In-Reply-To: <1576069760-11473-1-git-send-email-yamonkar@cadence.com>

From: Swapnil Jakhade <sjakhade@cadence.com>

Add reset support for PHY lane group.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
---
 drivers/phy/cadence/phy-cadence-torrent.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
index 6c3eaaa..ebc3b68 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -18,6 +18,7 @@
 #include <linux/of_device.h>
 #include <linux/phy/phy.h>
 #include <linux/platform_device.h>
+#include <linux/reset.h>
 
 #define REF_CLK_19_2MHz		19200000
 #define REF_CLK_25MHz		25000000
@@ -144,6 +145,7 @@ struct cdns_torrent_phy {
 	void __iomem *sd_base; /* SD0801 registers base */
 	u32 num_lanes; /* Number of lanes to use */
 	u32 max_bit_rate; /* Maximum link bit rate to use (in Mbps) */
+	struct reset_control *phy_rst;
 	struct device *dev;
 	struct clk *clk;
 	unsigned long ref_clk_rate;
@@ -182,9 +184,14 @@ static void cdns_dp_phy_write_field(struct cdns_torrent_phy *cdns_phy,
 				    unsigned char num_bits,
 				    unsigned int val);
 
+static int cdns_torrent_phy_on(struct phy *phy);
+static int cdns_torrent_phy_off(struct phy *phy);
+
 static const struct phy_ops cdns_torrent_phy_ops = {
 	.init		= cdns_torrent_dp_init,
 	.exit		= cdns_torrent_dp_exit,
+	.power_on	= cdns_torrent_phy_on,
+	.power_off	= cdns_torrent_phy_off,
 	.owner		= THIS_MODULE,
 };
 
@@ -317,6 +324,9 @@ static int cdns_torrent_dp_init(struct phy *phy)
 
 	/* take out of reset */
 	cdns_dp_phy_write_field(cdns_phy, PHY_RESET, 8, 1, 1);
+
+	cdns_torrent_phy_on(phy);
+
 	ret = cdns_torrent_dp_wait_pma_cmn_ready(cdns_phy);
 	if (ret)
 		return ret;
@@ -945,6 +955,21 @@ static void cdns_dp_phy_write_field(struct cdns_torrent_phy *cdns_phy,
 			      start_bit))));
 }
 
+static int cdns_torrent_phy_on(struct phy *phy)
+{
+	struct cdns_torrent_phy *cdns_phy = phy_get_drvdata(phy);
+
+	/* Take the PHY lane group out of reset */
+	return reset_control_deassert(cdns_phy->phy_rst);
+}
+
+static int cdns_torrent_phy_off(struct phy *phy)
+{
+	struct cdns_torrent_phy *cdns_phy = phy_get_drvdata(phy);
+
+	return reset_control_assert(cdns_phy->phy_rst);
+}
+
 static int cdns_torrent_phy_probe(struct platform_device *pdev)
 {
 	struct resource *regs;
@@ -976,6 +1001,8 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
 	if (IS_ERR(cdns_phy->sd_base))
 		return PTR_ERR(cdns_phy->sd_base);
 
+	cdns_phy->phy_rst = devm_reset_control_array_get_exclusive(dev);
+
 	err = device_property_read_u32(dev, "num_lanes",
 				       &cdns_phy->num_lanes);
 	if (err)
-- 
2.7.4


  parent reply	other threads:[~2019-12-11 13:09 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-11 13:09 [RESEND PATCH v1 00/15] PHY: Update Cadence Torrent PHY driver with reconfiguration Yuti Amonkar
2019-12-11 13:09 ` [RESEND PATCH v1 01/15] phy: Add DisplayPort configuration options Yuti Amonkar
2019-12-11 13:09 ` [RESEND PATCH v1 02/15] dt-bindings:phy: Convert Cadence MHDP PHY bindings to YAML Yuti Amonkar
2019-12-19 21:10   ` Rob Herring
2019-12-20  8:04     ` Yuti Suresh Amonkar
2019-12-11 13:09 ` [RESEND PATCH v1 03/15] phy: cadence-dp: Rename to phy-cadence-torrent Yuti Amonkar
2019-12-11 13:09 ` [RESEND PATCH v1 04/15] phy: cadence-torrent: Adopt Torrent nomenclature Yuti Amonkar
2019-12-11 13:09 ` [RESEND PATCH v1 05/15] phy: cadence-torrent: Add wrapper for PHY register access Yuti Amonkar
2019-12-11 13:09 ` [RESEND PATCH v1 06/15] phy: cadence-torrent: Add wrapper for DPTX " Yuti Amonkar
2019-12-11 13:09 ` [RESEND PATCH v1 07/15] phy: cadence-torrent: Refactor code for reusability Yuti Amonkar
2019-12-11 13:09 ` [RESEND PATCH v1 08/15] dt-bindings: phy: phy-cadence-torrent: Add clock bindings Yuti Amonkar
2019-12-19 21:14   ` Rob Herring
2019-12-11 13:09 ` [RESEND PATCH v1 09/15] phy: cadence-torrent: Add 19.2 MHz reference clock support Yuti Amonkar
2019-12-11 13:09 ` Yuti Amonkar [this message]
2019-12-11 13:09 ` [RESEND PATCH v1 11/15] phy: cadence-torrent: Implement PHY configure APIs Yuti Amonkar
2019-12-11 13:09 ` [RESEND PATCH v1 12/15] phy: cadence-torrent: Use regmap to read and write Torrent PHY registers Yuti Amonkar
2019-12-11 13:09 ` [RESEND PATCH v1 13/15] phy: cadence-torrent: Use regmap to read and write DPTX " Yuti Amonkar
2019-12-11 13:09 ` [RESEND PATCH v1 14/15] dt-bindings: phy: phy-cadence-torrent: Add platform dependent compatible string Yuti Amonkar
2019-12-19 21:25   ` Rob Herring
2019-12-20  9:43     ` Yuti Suresh Amonkar
2019-12-20 22:12       ` Rob Herring
2019-12-11 13:09 ` [RESEND PATCH v1 15/15] phy: cadence-torrent: Add platform dependent initialization structure Yuti Amonkar

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