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From: no-reply@patchew.org
To: aleksandar.markovic@rt-rk.com
Cc: aleksandar.rikalo@rt-rk.com, qemu-devel@nongnu.org,
	amarkovic@wavecomp.com
Subject: Re: [PATCH v3 0/5] target/mips: Misc MIPS fixes and improvements for 5.0
Date: Tue, 21 Jan 2020 07:31:56 -0800 (PST)	[thread overview]
Message-ID: <157962071517.5474.2669822731749732251@f6d1ed32ca6b> (raw)
In-Reply-To: <1579613937-5774-1-git-send-email-aleksandar.markovic@rt-rk.com>

Patchew URL: https://patchew.org/QEMU/1579613937-5774-1-git-send-email-aleksandar.markovic@rt-rk.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 1579613937-5774-1-git-send-email-aleksandar.markovic@rt-rk.com
Subject: [PATCH v3 0/5] target/mips: Misc MIPS fixes and improvements for 5.0

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/20200121151543.18538-1-philmd@redhat.com -> patchew/20200121151543.18538-1-philmd@redhat.com
Switched to a new branch 'test'
af60c76 disas: mips: Add micromips R6 disassembler
bcb85b1 target/mips: Add implementation of GINVT instruction
1ffd785 target/mips: Amend CP0 WatchHi register implementation
fed74b1 target/mips: Add support for MIPS<32|64>R6 CRC32 ISA
868e28b target/mips: Rectify documentation on deprecating r4k machine

=== OUTPUT BEGIN ===
1/5 Checking commit 868e28b14a58 (target/mips: Rectify documentation on deprecating r4k machine)
2/5 Checking commit fed74b114541 (target/mips: Add support for MIPS<32|64>R6 CRC32 ISA)
3/5 Checking commit 1ffd785201f7 (target/mips: Amend CP0 WatchHi register implementation)
4/5 Checking commit bcb85b11ec7d (target/mips: Add implementation of GINVT instruction)
5/5 Checking commit af60c76c7db1 (disas: mips: Add micromips R6 disassembler)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: space prohibited between function name and open parenthesis '('
#5716: FILE: include/disas/dis-asm.h:392:
+int print_insn_micromips_r6      (bfd_vma, disassemble_info*);

total: 1 errors, 1 warnings, 5693 lines checked

Patch 5/5 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/1579613937-5774-1-git-send-email-aleksandar.markovic@rt-rk.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

      parent reply	other threads:[~2020-01-21 15:40 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-21 13:38 [PATCH v3 0/5] target/mips: Misc MIPS fixes and improvements for 5.0 Aleksandar Markovic
2020-01-21 13:38 ` [PATCH v3 1/5] target/mips: Rectify documentation on deprecating r4k machine Aleksandar Markovic
2020-01-21 13:38 ` [PATCH v3 2/5] target/mips: Add support for MIPS<32|64>R6 CRC32 ISA Aleksandar Markovic
2020-01-22  2:17   ` Taylor Simpson
2020-01-23 14:30     ` Aleksandar Markovic
2020-01-21 13:38 ` [PATCH v3 3/5] target/mips: Amend CP0 WatchHi register implementation Aleksandar Markovic
2020-01-21 13:38 ` [PATCH v3 4/5] target/mips: Add implementation of GINVT instruction Aleksandar Markovic
2020-01-21 13:38 ` [PATCH v3 5/5] disas: mips: Add micromips R6 disassembler Aleksandar Markovic
2020-01-21 15:31 ` no-reply [this message]

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