From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex Nemirovsky Date: Thu, 30 Jul 2020 12:05:42 -0700 Subject: [PATCH v2 3/3] board: presidio-asic: Add CAxxxx Ethernet support In-Reply-To: <1596135942-28393-1-git-send-email-alex.nemirovsky@cortina-access.com> References: <1596135942-28393-1-git-send-email-alex.nemirovsky@cortina-access.com> Message-ID: <1596135942-28393-3-git-send-email-alex.nemirovsky@cortina-access.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Add CAxxxx Ethernet support for the Cortina Access Presidio Engineering Board Signed-off-by: Alex Nemirovsky CC: Tom Rini --- Changes in v2: - only support DM_ETH network models by removing code for legacy mode support arch/arm/dts/ca-presidio-engboard.dts | 7 +++++++ board/cortina/presidio-asic/presidio.c | 31 ++++++++++++++++++++++++++++ configs/cortina_presidio-asic-emmc_defconfig | 4 +++- include/configs/presidio_asic.h | 15 +++++++++++++- 4 files changed, 55 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/ca-presidio-engboard.dts b/arch/arm/dts/ca-presidio-engboard.dts index 40c93d7..4e5681a 100644 --- a/arch/arm/dts/ca-presidio-engboard.dts +++ b/arch/arm/dts/ca-presidio-engboard.dts @@ -64,4 +64,11 @@ spi-max-frequency = <108000000>; }; }; + + eth: ethnet at 0xf4300000 { + compatible = "eth_cortina"; + reg = <0x0 0xf4320000 0x34>, + <0x0 0xf43290d8 0x04>, + <0x0 0xf4304000 0x04>; + }; }; diff --git a/board/cortina/presidio-asic/presidio.c b/board/cortina/presidio-asic/presidio.c index 3c132f1..74e0ba6 100644 --- a/board/cortina/presidio-asic/presidio.c +++ b/board/cortina/presidio-asic/presidio.c @@ -134,3 +134,34 @@ int last_stage_init(void) return 0; } #endif + +enum ca_port_t { + NI_PORT_0 = 0, + NI_PORT_1, + NI_PORT_2, + NI_PORT_3, + NI_PORT_4, + NI_PORT_5, + NI_PORT_MAX, +}; + +struct port_map_s { + int active_port; + int phy_addr; +}; + +/* port0: phy address 1 - GMAC0: port 0 + * port1: phy address 2 - GMAC1: port 1 + * port2: phy address 3 - GMAC2: port 2 + * port3: phy address 4 - GMAC3: port 3 + * port4: phy address 5 - RGMII: port 4 + */ +struct port_map_s port_map[NI_PORT_MAX] = { + {NI_PORT_0, 1}, + {NI_PORT_1, 2}, + {NI_PORT_2, 3}, + {NI_PORT_3, 4}, + {NI_PORT_4, 5} +}; + +int active_port = NI_PORT_3; /* Physical port 3 */ diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index e10008a..360ebeb 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -21,12 +21,14 @@ CONFIG_CMD_EXT4=y CONFIG_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" -# CONFIG_NET is not set CONFIG_DM=y CONFIG_CORTINA_GPIO=y CONFIG_DM_MMC=y CONFIG_MMC_DW=y CONFIG_MMC_DW_CORTINA=y +CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_CORTINA_NI_ENET=y CONFIG_DM_SERIAL=y CONFIG_CORTINA_UART=y CONFIG_WDT=y diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 51177f4..8cbb1df 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -2,7 +2,7 @@ /* * Copyright (C) 2020 Cortina Access Inc. * - * Configuration for Cortina-Access Presidio board. + * Configuration for Cortina-Access Presidio board */ #ifndef __PRESIDIO_ASIC_H @@ -64,6 +64,19 @@ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define KSEG1_ATU_XLAT(x) (x) + +/* HW REG ADDR */ +#define NI_READ_POLL_COUNT 1000 +#define CA_NI_MDIO_REG_BASE 0xF4338 +#define NI_HV_GLB_MAC_ADDR_CFG0_OFFSET 0x010 +#define NI_HV_GLB_MAC_ADDR_CFG1_OFFSET 0x014 +#define NI_HV_PT_BASE 0x400 +#define NI_HV_XRAM_BASE 0x820 +#define GLOBAL_BLOCK_RESET_OFFSET 0x04 +#define GLOBAL_GLOBAL_CONFIG_OFFSET 0x20 +#define GLOBAL_IO_DRIVE_CONTROL_OFFSET 0x4c + /* max command args */ #define CONFIG_SYS_MAXARGS 64 #define CONFIG_EXTRA_ENV_SETTINGS "silent=y\0" -- 2.7.4