From: Mark Brown <broonie@kernel.org>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>,
Feng Tang <feng.tang@intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
Andy Shevchenko <andy.shevchenko@gmail.com>,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
Lars Povlsen <lars.povlsen@microchip.com>,
devicetree@vger.kernel.org, Serge Semin <fancer.lancer@gmail.com>,
"wuxu . wu" <wuxu.wu@huawei.com>
Subject: Re: [PATCH 00/30] spi: dw: Add full Baikal-T1 SPI Controllers support
Date: Tue, 29 Sep 2020 17:23:26 +0100 [thread overview]
Message-ID: <160139659999.766.14300777884222792440.b4-ty@kernel.org> (raw)
In-Reply-To: <20200920112914.26501-1-Sergey.Semin@baikalelectronics.ru>
On Sun, 20 Sep 2020 14:28:44 +0300, Serge Semin wrote:
> Originally I intended to merge a dedicated Baikal-T1 System Boot SPI
> Controller driver into the kernel and leave the DW APB SSI driver
> untouched. But after a long discussion (see the link at the bottom of the
> letter) Mark and Andy persuaded me to integrate what we developed there
> into the DW APB SSI core driver to be useful for another controllers,
> which may have got the same peculiarities/problems as ours:
> - No IRQ.
> - No DMA.
> - No GPIO CS, so a native CS is utilized.
> - small Tx/Rx FIFO depth.
> - Automatic CS assertion/de-assertion.
> - Slow system bus.
> All of them have been fixed in the framework of this patchset in some
> extent at least for the SPI memory operations. As I expected it wasn't
> that easy and the integration took that many patches as you can see from
> the subject. Though some of them are mere cleanups or weakly related with
> the subject fixes, but we just couldn't leave the code as is at some
> places since we were working with the DW APB SSI driver anyway. Here is
> what we did to fix the original DW APB SSI driver, to make it less messy.
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
Thanks!
[1/9] spi: dw: Discard IRQ threshold macro
commit: 07918df724f2fed02327e3cbfe58a5d5568b2cc2
[2/9] spi: dw: Initialize n_bytes before the memory barrier
commit: 8225c1c9a073c323f68833d136fcf94fbc75a275
[3/9] spi: spi-dw: Remove extraneous locking
commit: 0b6bfad4cee4a3d5c49e01fa00284db4b676360e
[4/9] spi: dw: Clear IRQ status on DW SPI controller reset
commit: a128f6ecd56a32e559889145003425b0c7d406e3
[5/9] spi: dw: Disable all IRQs when controller is unused
commit: a1d5aa6f7f97b15e8fd917169239088823471741
[6/9] spi: dw: Use relaxed IO-methods to access FIFOs
commit: 7e31cea7d1e0f4b683dc45c21530cd3ee82559b4
[7/9] spi: dw: Discard DW SSI chip type storages
commit: 675e7c9d71cedee3988b554c47971be77e72d2db
[8/9] spi: dw: Convert CS-override to DW SPI capabilities
commit: cc760f3143f53ea8387cd76cffc43bdc89db9df4
[9/9] spi: dw: Add KeemBay Master capability
commit: ffb7ca54c95b4c76ad8a9aa1b2b16d61df2a7139
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
prev parent reply other threads:[~2020-09-29 16:24 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-20 11:28 [PATCH 00/30] spi: dw: Add full Baikal-T1 SPI Controllers support Serge Semin
2020-09-20 11:28 ` [PATCH 01/30] spi: dw: Discard IRQ threshold macro Serge Semin
2020-09-20 11:28 ` [PATCH 02/30] spi: dw: Use ternary op to init set_cs callback Serge Semin
2020-09-29 13:11 ` Mark Brown
2020-09-29 21:55 ` Serge Semin
2020-09-30 14:57 ` Serge Semin
2020-09-30 15:01 ` Mark Brown
2020-09-30 15:07 ` Serge Semin
2020-09-20 11:28 ` [PATCH 03/30] spi: dw: Initialize n_bytes before the memory barrier Serge Semin
2020-09-29 13:12 ` Mark Brown
2020-09-29 22:05 ` Serge Semin
2020-09-20 11:28 ` [PATCH 04/30] Revert: spi: spi-dw: Add lock protect dw_spi rx/tx to prevent concurrent calls Serge Semin
2020-09-29 13:28 ` Mark Brown
2020-09-29 22:08 ` Serge Semin
2020-09-20 11:28 ` [PATCH 05/30] spi: dw: Clear IRQ status on DW SPI controller reset Serge Semin
2020-09-20 11:28 ` [PATCH 06/30] spi: dw: Disable all IRQs when controller is unused Serge Semin
2020-09-20 11:28 ` [PATCH 07/30] spi: dw: Use relaxed IO-methods to access FIFOs Serge Semin
2020-09-20 11:28 ` [PATCH 08/30] spi: dw: Discard DW SSI chip type storages Serge Semin
2020-09-20 11:28 ` [PATCH 09/30] spi: dw: Convert CS-override to DW SPI capabilities Serge Semin
2020-09-20 11:28 ` [PATCH 10/30] spi: dw: Add KeemBay Master capability Serge Semin
2020-09-20 11:28 ` [PATCH 11/30] spi: dw: Add DWC SSI capability Serge Semin
2020-09-29 13:52 ` Mark Brown
2020-09-29 22:17 ` Serge Semin
2020-09-30 15:03 ` Serge Semin
2020-09-30 15:41 ` Mark Brown
2020-09-30 15:53 ` Serge Semin
2020-09-20 11:28 ` [PATCH 12/30] spi: dw: Detach SPI device specific CR0 config method Serge Semin
2020-09-20 11:28 ` [PATCH 13/30] spi: dw: Update SPI bus speed in a config function Serge Semin
2020-09-20 11:28 ` [PATCH 14/30] spi: dw: Simplify the SPI bus speed config procedure Serge Semin
2020-09-20 11:28 ` [PATCH 15/30] spi: dw: Update Rx sample delay in the config function Serge Semin
2020-09-20 11:29 ` [PATCH 16/30] spi: dw: Add DW SPI controller config structure Serge Semin
2020-09-20 11:29 ` [PATCH 17/30] spi: dw: Refactor data IO procedure Serge Semin
2020-09-20 11:29 ` [PATCH 18/30] spi: dw: Refactor IRQ-based SPI transfer procedure Serge Semin
2020-09-20 11:29 ` [PATCH 19/30] spi: dw: Perform IRQ setup in a dedicated function Serge Semin
2020-09-20 11:29 ` [PATCH 20/30] spi: dw: Unmask IRQs after enabling the chip Serge Semin
2020-09-20 11:29 ` [PATCH 21/30] spi: dw: Discard chip enabling on DMA setup error Serge Semin
2020-09-20 11:29 ` [PATCH 22/30] spi: dw: De-assert chip-select on reset Serge Semin
2020-09-20 11:29 ` [PATCH 23/30] spi: dw: Explicitly de-assert CS on SPI transfer completion Serge Semin
2020-09-20 11:29 ` [PATCH 24/30] spi: dw: Move num-of retries parameter to the header file Serge Semin
2020-09-20 11:29 ` [PATCH 25/30] spi: dw: Add generic DW SSI status-check method Serge Semin
2020-09-20 11:29 ` [PATCH 26/30] spi: dw: Add memory operations support Serge Semin
2020-09-20 11:29 ` [PATCH 27/30] spi: dw: Introduce max mem-ops SPI bus frequency setting Serge Semin
2020-09-20 11:29 ` [PATCH 28/30] spi: dw: Add poll-based SPI transfers support Serge Semin
2020-09-20 11:29 ` [PATCH 29/30] dt-bindings: spi: dw: Add Baikal-T1 SPI Controllers Serge Semin
2020-09-29 16:58 ` Rob Herring
2020-09-20 11:41 ` [PATCH 30/30] spi: dw: Add Baikal-T1 SPI Controller glue driver Serge Semin
2020-09-29 14:43 ` [PATCH 00/30] spi: dw: Add full Baikal-T1 SPI Controllers support Mark Brown
2020-09-29 22:43 ` Serge Semin
2020-09-30 11:04 ` Mark Brown
2020-09-30 13:11 ` Serge Semin
2020-09-30 14:43 ` Mark Brown
2020-09-29 16:23 ` Mark Brown [this message]
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