From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.2 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8AA1DC43381 for ; Mon, 4 Jan 2021 09:53:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5CD7C2220F for ; Mon, 4 Jan 2021 09:53:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726693AbhADJwr (ORCPT ); Mon, 4 Jan 2021 04:52:47 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:58564 "EHLO mailgw02.mediatek.com" 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Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 4 Jan 2021 17:52:00 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 4 Jan 2021 17:52:01 +0800 Message-ID: <1609753920.7157.3.camel@mtksdaap41> Subject: Re: [PATCH v10 3/7] [v10, 3/7]: soc: mediatek: SVS: introduce MTK SVS engine From: Roger Lu To: Nicolas Boichat CC: Matthias Brugger , Enric Balletbo Serra , Kevin Hilman , Rob Herring , Nicolas Boichat , Stephen Boyd , Philipp Zabel , Mark Rutland , Nishanth Menon , Angus Lin , Devicetree List , "open list:THERMAL" , lkml , Xiaoqing Liu , YT Lee , Fan Chen , "moderated list:ARM/Mediatek SoC support" , "HenryC Chen" , Charles Yang , linux-arm Mailing List Date: Mon, 4 Jan 2021 17:52:00 +0800 In-Reply-To: References: <20201227105449.11452-1-roger.lu@mediatek.com> <20201227105449.11452-4-roger.lu@mediatek.com> <1609750266.20758.40.camel@mtksdaap41> Content-Type: text/plain; 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ESMTP id 323251984; Mon, 04 Jan 2021 01:56:10 -0800 Received: from MTKMBS02N1.mediatek.inc (172.21.101.77) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 4 Jan 2021 01:52:02 -0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 4 Jan 2021 17:52:00 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 4 Jan 2021 17:52:01 +0800 Message-ID: <1609753920.7157.3.camel@mtksdaap41> Subject: Re: [PATCH v10 3/7] [v10, 3/7]: soc: mediatek: SVS: introduce MTK SVS engine From: Roger Lu To: Nicolas Boichat Date: Mon, 4 Jan 2021 17:52:00 +0800 In-Reply-To: References: <20201227105449.11452-1-roger.lu@mediatek.com> <20201227105449.11452-4-roger.lu@mediatek.com> <1609750266.20758.40.camel@mtksdaap41> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210104_045613_341409_D4F2D773 X-CRM114-Status: GOOD ( 33.44 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Nicolas Boichat , Nishanth Menon , Kevin Hilman , Enric Balletbo Serra , "open list:THERMAL" , Angus Lin , Xiaoqing Liu , lkml , Stephen Boyd , Devicetree List , Rob Herring , "moderated list:ARM/Mediatek SoC support" , HenryC Chen , Philipp Zabel , Charles Yang , Matthias Brugger , YT Lee , Fan Chen , linux-arm Mailing List Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Hi Nicolas, On Mon, 2021-01-04 at 17:27 +0800, Nicolas Boichat wrote: > On Mon, Jan 4, 2021 at 4:51 PM Roger Lu wrote: > > > > > > Hi Nicolas, > > > > Thanks for all the advices. > > > > On Thu, 2020-12-31 at 10:10 +0800, Nicolas Boichat wrote: > > > On Sun, Dec 27, 2020 at 6:55 PM Roger Lu wrote: > [snip] > > > > +static int svs_adjust_pm_opp_volts(struct svs_bank *svsb, bool force_update) > > > > +{ > > > > + int tzone_temp, ret = -EPERM; > > > > > > No need to initialize ret. > > > > Oh, excuse me, some coding check tool warn that this `ret` might return > > without being uninitialized. Therefore, I'll keep the initialization. > > Oh, you're right, there is a possible path where ret is not set. sgtm then. > > > > > > > > > > + u32 i, svsb_volt, opp_volt, temp_offset = 0; > > > > + > > > > + mutex_lock(&svsb->lock); > > > > + > > > > + /* > > > > + * If svs bank is suspended, it means signed-off voltages are applied. > > > > + * Don't need to update opp voltage anymore. > > > > + */ > > > > + if (svsb->suspended && !force_update) { > > > > + dev_notice(svsb->dev, "bank is suspended\n"); > > > > + ret = -EPERM; > > > > + goto unlock_mutex; > > > > + } > > > > + > > > > + /* Get thermal effect */ > > > > + if (svsb->phase == SVSB_PHASE_MON) { > > > > + if (svsb->temp > svsb->temp_upper_bound && > > > > + svsb->temp < svsb->temp_lower_bound) { > > > > + dev_warn(svsb->dev, "svsb temp = 0x%x?\n", svsb->temp); > > > > + ret = -EINVAL; > > > > + goto unlock_mutex; > > > > + } > > > > + > > > > + ret = svs_get_bank_zone_temperature(svsb->tzone_name, > > > > + &tzone_temp); > > > > + if (ret) { > > > > + dev_err(svsb->dev, "no \"%s\"?(%d)?\n", > > > > + svsb->tzone_name, ret); > > > > + dev_err(svsb->dev, "set signed-off voltage\n"); > > > > > > Please merge the error message in one line (I'm not sure what "set > > > signed-off voltage" means here). > > > > 1. Ok, I'll merge them. Thanks. > > 2. signed-off voltages means CPU DVFS default voltages > > So just write "default voltages" then? ,-) Ok, thanks. :) > > > > > > > [snip] > > > > +static irqreturn_t svs_isr(int irq, void *data) > > > > +{ > > > > + struct svs_platform *svsp = (struct svs_platform *)data; > > > > > > cast not needed. > > > > Ok, I'll remove it. Thanks. > > > > > > > > > + struct svs_bank *svsb = NULL; > > > > + unsigned long flags; > > > > + u32 idx, int_sts, svs_en; > > > > + > > > > + for (idx = 0; idx < svsp->bank_num; idx++) { > > > > + svsb = &svsp->banks[idx]; > > > > + > > > > + spin_lock_irqsave(&mtk_svs_lock, flags); > > > > + svsp->pbank = svsb; > > > > + > > > > + /* Find out which svs bank fires interrupt */ > > > > + if (svsb->int_st & svs_readl(svsp, INTST)) { > > > > + spin_unlock_irqrestore(&mtk_svs_lock, flags); > > > > + continue; > > > > + } > > > > + > > > > + if (!svsb->suspended) { > > > > + svs_switch_bank(svsp); > > > > + int_sts = svs_readl(svsp, INTSTS); > > > > + svs_en = svs_readl(svsp, SVSEN); > > > > + > > > > + if (int_sts == SVSB_INTSTS_COMPLETE && > > > > + ((svs_en & SVSB_EN_MASK) == SVSB_EN_INIT01)) > > > > + svs_init01_isr_handler(svsp); > > > > + else if ((int_sts == SVSB_INTSTS_COMPLETE) && > > > > + ((svs_en & SVSB_EN_MASK) == SVSB_EN_INIT02)) > > > > + svs_init02_isr_handler(svsp); > > > > + else if (!!(int_sts & SVSB_INTSTS_MONVOP)) > > > > > > !! is not required. > > > > Ok, I'll remove it. Thanks. > > > > > > > > > + svs_mon_mode_isr_handler(svsp); > > > > + else > > > > + svs_error_isr_handler(svsp); > > > > + } > > > > + > > > > + spin_unlock_irqrestore(&mtk_svs_lock, flags); > > > > + break; > > > > + } > > > > > > This will panic if svsb is NULL, is that ok or do you want to catch that? > > > > Oh, it is fine. Thanks for the heads-up. > > I should have been stronger in my statement, I think you want to add a > BUG_ON(!svsb) to crash in a slightly more predictable manner. Ok, I'll add BUG_ON(!svsb) to give an evident heads-up. Thanks. > > [snip] > > > > + > > > > + svsp->tefuse = (u32 *)nvmem_cell_read(cell, &svsp->tefuse_num); > > > > > > Cast not needed. > > > > Ok, I'll remove it if build/test ok. Because nvmem_cell_read returns > > (void *). > > > > > > > > Also, this need to be freed somewhere in remove code (kfree(svsp->tefuse)). > > > > > > And it seems like svsp->tefuse is only used in this function, can you > > > just allocate it here? > > > > Oh, svsp->tefuse will be used in SVS debug patch for debug purpose. So, > > I need to save it as struct member. > > Oh I missed that, sgtm then. Thanks. > > > > [snip] _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B478C433E0 for ; Mon, 4 Jan 2021 09:58:14 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BC2472072E for ; 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Mon, 04 Jan 2021 01:56:10 -0800 Received: from MTKMBS02N1.mediatek.inc (172.21.101.77) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 4 Jan 2021 01:52:02 -0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs02n1.mediatek.inc (172.21.101.77) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 4 Jan 2021 17:52:00 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 4 Jan 2021 17:52:01 +0800 Message-ID: <1609753920.7157.3.camel@mtksdaap41> Subject: Re: [PATCH v10 3/7] [v10, 3/7]: soc: mediatek: SVS: introduce MTK SVS engine From: Roger Lu To: Nicolas Boichat Date: Mon, 4 Jan 2021 17:52:00 +0800 In-Reply-To: References: <20201227105449.11452-1-roger.lu@mediatek.com> <20201227105449.11452-4-roger.lu@mediatek.com> <1609750266.20758.40.camel@mtksdaap41> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210104_045613_341409_D4F2D773 X-CRM114-Status: GOOD ( 33.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Nicolas Boichat , Nishanth Menon , Kevin Hilman , Enric Balletbo Serra , "open list:THERMAL" , Angus Lin , Xiaoqing Liu , lkml , Stephen Boyd , Devicetree List , Rob Herring , "moderated list:ARM/Mediatek SoC support" , HenryC Chen , Philipp Zabel , Charles Yang , Matthias Brugger , YT Lee , Fan Chen , linux-arm Mailing List Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Nicolas, On Mon, 2021-01-04 at 17:27 +0800, Nicolas Boichat wrote: > On Mon, Jan 4, 2021 at 4:51 PM Roger Lu wrote: > > > > > > Hi Nicolas, > > > > Thanks for all the advices. > > > > On Thu, 2020-12-31 at 10:10 +0800, Nicolas Boichat wrote: > > > On Sun, Dec 27, 2020 at 6:55 PM Roger Lu wrote: > [snip] > > > > +static int svs_adjust_pm_opp_volts(struct svs_bank *svsb, bool force_update) > > > > +{ > > > > + int tzone_temp, ret = -EPERM; > > > > > > No need to initialize ret. > > > > Oh, excuse me, some coding check tool warn that this `ret` might return > > without being uninitialized. Therefore, I'll keep the initialization. > > Oh, you're right, there is a possible path where ret is not set. sgtm then. > > > > > > > > > > + u32 i, svsb_volt, opp_volt, temp_offset = 0; > > > > + > > > > + mutex_lock(&svsb->lock); > > > > + > > > > + /* > > > > + * If svs bank is suspended, it means signed-off voltages are applied. > > > > + * Don't need to update opp voltage anymore. > > > > + */ > > > > + if (svsb->suspended && !force_update) { > > > > + dev_notice(svsb->dev, "bank is suspended\n"); > > > > + ret = -EPERM; > > > > + goto unlock_mutex; > > > > + } > > > > + > > > > + /* Get thermal effect */ > > > > + if (svsb->phase == SVSB_PHASE_MON) { > > > > + if (svsb->temp > svsb->temp_upper_bound && > > > > + svsb->temp < svsb->temp_lower_bound) { > > > > + dev_warn(svsb->dev, "svsb temp = 0x%x?\n", svsb->temp); > > > > + ret = -EINVAL; > > > > + goto unlock_mutex; > > > > + } > > > > + > > > > + ret = svs_get_bank_zone_temperature(svsb->tzone_name, > > > > + &tzone_temp); > > > > + if (ret) { > > > > + dev_err(svsb->dev, "no \"%s\"?(%d)?\n", > > > > + svsb->tzone_name, ret); > > > > + dev_err(svsb->dev, "set signed-off voltage\n"); > > > > > > Please merge the error message in one line (I'm not sure what "set > > > signed-off voltage" means here). > > > > 1. Ok, I'll merge them. Thanks. > > 2. signed-off voltages means CPU DVFS default voltages > > So just write "default voltages" then? ,-) Ok, thanks. :) > > > > > > > [snip] > > > > +static irqreturn_t svs_isr(int irq, void *data) > > > > +{ > > > > + struct svs_platform *svsp = (struct svs_platform *)data; > > > > > > cast not needed. > > > > Ok, I'll remove it. Thanks. > > > > > > > > > + struct svs_bank *svsb = NULL; > > > > + unsigned long flags; > > > > + u32 idx, int_sts, svs_en; > > > > + > > > > + for (idx = 0; idx < svsp->bank_num; idx++) { > > > > + svsb = &svsp->banks[idx]; > > > > + > > > > + spin_lock_irqsave(&mtk_svs_lock, flags); > > > > + svsp->pbank = svsb; > > > > + > > > > + /* Find out which svs bank fires interrupt */ > > > > + if (svsb->int_st & svs_readl(svsp, INTST)) { > > > > + spin_unlock_irqrestore(&mtk_svs_lock, flags); > > > > + continue; > > > > + } > > > > + > > > > + if (!svsb->suspended) { > > > > + svs_switch_bank(svsp); > > > > + int_sts = svs_readl(svsp, INTSTS); > > > > + svs_en = svs_readl(svsp, SVSEN); > > > > + > > > > + if (int_sts == SVSB_INTSTS_COMPLETE && > > > > + ((svs_en & SVSB_EN_MASK) == SVSB_EN_INIT01)) > > > > + svs_init01_isr_handler(svsp); > > > > + else if ((int_sts == SVSB_INTSTS_COMPLETE) && > > > > + ((svs_en & SVSB_EN_MASK) == SVSB_EN_INIT02)) > > > > + svs_init02_isr_handler(svsp); > > > > + else if (!!(int_sts & SVSB_INTSTS_MONVOP)) > > > > > > !! is not required. > > > > Ok, I'll remove it. Thanks. > > > > > > > > > + svs_mon_mode_isr_handler(svsp); > > > > + else > > > > + svs_error_isr_handler(svsp); > > > > + } > > > > + > > > > + spin_unlock_irqrestore(&mtk_svs_lock, flags); > > > > + break; > > > > + } > > > > > > This will panic if svsb is NULL, is that ok or do you want to catch that? > > > > Oh, it is fine. Thanks for the heads-up. > > I should have been stronger in my statement, I think you want to add a > BUG_ON(!svsb) to crash in a slightly more predictable manner. Ok, I'll add BUG_ON(!svsb) to give an evident heads-up. Thanks. > > [snip] > > > > + > > > > + svsp->tefuse = (u32 *)nvmem_cell_read(cell, &svsp->tefuse_num); > > > > > > Cast not needed. > > > > Ok, I'll remove it if build/test ok. Because nvmem_cell_read returns > > (void *). > > > > > > > > Also, this need to be freed somewhere in remove code (kfree(svsp->tefuse)). > > > > > > And it seems like svsp->tefuse is only used in this function, can you > > > just allocate it here? > > > > Oh, svsp->tefuse will be used in SVS debug patch for debug purpose. So, > > I need to save it as struct member. > > Oh I missed that, sgtm then. Thanks. > > > > [snip] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel