From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ye Li Date: Thu, 18 Feb 2021 23:07:42 -0800 Subject: [PATCH 4/9] arm: dts: imx8mp: Add EQoS controller node In-Reply-To: <1613718467-88336-1-git-send-email-ye.li@nxp.com> References: <1613718467-88336-1-git-send-email-ye.li@nxp.com> Message-ID: <1613718467-88336-4-git-send-email-ye.li@nxp.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Add node for EQoS ethernet controller as the second ethernet port on i.MX8MP Signed-off-by: Ye Li --- arch/arm/dts/imx8mp.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi index ecccfbb..813dc66 100644 --- a/arch/arm/dts/imx8mp.dtsi +++ b/arch/arm/dts/imx8mp.dtsi @@ -18,6 +18,7 @@ aliases { ethernet0 = &fec; + ethernet1 = &eqos; gpio0 = &gpio1; gpio1 = &gpio2; gpio2 = &gpio3; @@ -771,6 +772,28 @@ fsl,num-rx-queues = <3>; status = "disabled"; }; + + eqos: ethernet at 30bf0000 { + compatible = "nxp,imx8mp-dwmac-eqos", "snps,dwmac-5.10a"; + reg = <0x30bf0000 0x10000>; + interrupts = , + ; + interrupt-names = "eth_wake_irq", "macirq"; + clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>, + <&clk IMX8MP_CLK_QOS_ENET_ROOT>, + <&clk IMX8MP_CLK_ENET_QOS_TIMER>, + <&clk IMX8MP_CLK_ENET_QOS>; + clock-names = "stmmaceth", "pclk", "ptp_ref", "tx"; + assigned-clocks = <&clk IMX8MP_CLK_ENET_AXI>, + <&clk IMX8MP_CLK_ENET_QOS_TIMER>, + <&clk IMX8MP_CLK_ENET_QOS>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>, + <&clk IMX8MP_SYS_PLL2_100M>, + <&clk IMX8MP_SYS_PLL2_125M>; + assigned-clock-rates = <0>, <100000000>, <125000000>; + intf_mode = <&gpr 0x4>; + status = "disabled"; + }; }; gic: interrupt-controller at 38800000 { -- 2.7.4