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From: chunming <chunming_li1234@163.com>
To: eric.auger@redhat.com, peter.maydell@linaro.org
Cc: renwei.liu@verisilicon.com, qemu-arm@nongnu.org,
	jianxian.wen@verisilicon.com, qemu-devel@nongnu.org,
	chunming <chunming.li@verisilicon.com>
Subject: [PATCH v5 3/4] hw/arm/virt: Update SMMU v3 creation to support non PCI/PCIe device connection
Date: Wed, 25 Aug 2021 16:08:41 +0800	[thread overview]
Message-ID: <1629878922-173270-4-git-send-email-chunming_li1234@163.com> (raw)
In-Reply-To: <1629878922-173270-1-git-send-email-chunming_li1234@163.com>

From: chunming <chunming.li@verisilicon.com>

  . Add "smmuv3_sidmap" to set non PCI/PCIe devices SID value
  . Pass non PCI/PCIe devices SID value to SMMU v3 model creation
  . Store SMMU v3 device in virtual machine then non PCI/PCIe can get its memory region later

Signed-off-by: chunming <chunming.li@verisilicon.com>
---
 hw/arm/virt.c         | 18 +++++++++++++++++-
 include/hw/arm/virt.h |  2 ++
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 81eda46b0b..c3fd30e071 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -204,6 +204,10 @@ static const char *valid_cpus[] = {
     ARM_CPU_TYPE_NAME("max"),
 };
 
+static const uint16_t smmuv3_sidmap[] = {
+
+};
+
 static bool cpu_type_valid(const char *cpu)
 {
     int i;
@@ -1223,7 +1227,7 @@ static void create_pcie_irq_map(const MachineState *ms,
                            0x7           /* PCI irq */);
 }
 
-static void create_smmu(const VirtMachineState *vms,
+static void create_smmu(VirtMachineState *vms,
                         PCIBus *bus)
 {
     char *node;
@@ -1244,6 +1248,16 @@ static void create_smmu(const VirtMachineState *vms,
 
     object_property_set_link(OBJECT(dev), "primary-bus", OBJECT(bus),
                              &error_abort);
+
+    vms->smmuv3 = dev;
+
+    qdev_prop_set_uint32(dev, "len-sid-map", ARRAY_SIZE(smmuv3_sidmap));
+
+    for (i = 0; i < ARRAY_SIZE(smmuv3_sidmap); i++) {
+        g_autofree char *propname = g_strdup_printf("sid-map[%d]", i);
+        qdev_prop_set_uint16(dev, propname, smmuv3_sidmap[i]);
+    }
+
     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
     for (i = 0; i < NUM_SMMU_IRQS; i++) {
@@ -2762,6 +2776,8 @@ static void virt_instance_init(Object *obj)
 
     vms->irqmap = a15irqmap;
 
+    vms->sidmap = smmuv3_sidmap;
+
     virt_flash_create(vms);
 
     vms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 9661c46699..d3402a43dd 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -167,6 +167,8 @@ struct VirtMachineState {
     PCIBus *bus;
     char *oem_id;
     char *oem_table_id;
+    DeviceState *smmuv3;
+    const uint16_t *sidmap;
 };
 
 #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
-- 
2.30.2




  parent reply	other threads:[~2021-08-25 13:05 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-25  8:08 [PATCH v5 0/4] hw/arm/smmuv3: Support non PCI/PCIe devices chunming
2021-08-25  8:08 ` [PATCH v5 1/4] hw/arm/smmuv3: Support non PCI/PCIe device connect with SMMU v3 chunming
2021-08-31 14:01   ` Eric Auger
2021-09-01  6:51     ` Li, Chunming
2021-08-25  8:08 ` [PATCH v5 2/4] hw/arm/smmuv3: Update implementation of CFGI commands based on device SID chunming
2021-08-31 14:01   ` Eric Auger
2021-09-01  6:51     ` Li, Chunming
2021-09-01 12:04       ` Eric Auger
2021-09-02  1:59         ` Li, Chunming
2021-08-25  8:08 ` chunming [this message]
2021-08-31 14:13   ` [PATCH v5 3/4] hw/arm/virt: Update SMMU v3 creation to support non PCI/PCIe device connection Eric Auger
2021-09-01  6:51     ` Li, Chunming
2021-08-25  8:08 ` [PATCH v5 4/4] hw/arm/virt: Add PL330 DMA controller and connect with SMMU v3 chunming
2021-08-31 14:36   ` Eric Auger
2021-09-01  6:53     ` Li, Chunming
2021-09-01 10:22       ` Eric Auger
2021-09-02  6:46         ` Li, Chunming
2021-09-02  7:45           ` Eric Auger
2021-09-02  8:22             ` Li, Chunming
2021-09-07 11:00               ` Peter Maydell
2021-09-07 17:02                 ` Leif Lindholm
2021-09-07  9:01             ` Li, Chunming

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