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[114.34.229.221]) by smtp.gmail.com with ESMTPSA id e1sm2196056pfl.162.2020.09.10.01.13.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Sep 2020 01:13:18 -0700 (PDT) From: Greentime Hu To: greentime.hu@sifive.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu, palmer@dabbelt.com, paul.walmsley@sifive.com Cc: Vincent Chen Subject: [RFC PATCH v7 20/21] riscv: Allocate space for vector registers in start_thread() Date: Thu, 10 Sep 2020 16:12:15 +0800 Message-Id: <1b09427788749bf7b5e35c771657661bd7165348.1599719352.git.greentime.hu@sifive.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org It allocates memory space for vector registers in start_thread() instead of allocating in vstate_restore() in this patch. We can allocate memory here so that it will be more readable. Signed-off-by: Greentime Hu Signed-off-by: Vincent Chen --- arch/riscv/include/asm/switch_to.h | 7 +------ arch/riscv/kernel/process.c | 8 ++++++++ 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h index d33a86a48f0d..58898d33bf28 100644 --- a/arch/riscv/include/asm/switch_to.h +++ b/arch/riscv/include/asm/switch_to.h @@ -98,12 +98,6 @@ static inline void vstate_restore(struct task_struct *task, { if ((regs->status & SR_VS) != SR_VS_OFF) { struct __riscv_v_state *vstate = &(task->thread.vstate); - - /* Allocate space for vector registers. */ - if (!vstate->datap) { - vstate->datap = kzalloc(riscv_vsize, GFP_ATOMIC); - vstate->size = riscv_vsize; - } __vstate_restore(vstate, vstate->datap); __vstate_clean(regs); } @@ -122,6 +116,7 @@ static inline void __switch_to_vector(struct task_struct *prev, #else #define has_vector false +#define riscv_vsize (0) #define vstate_save(task, regs) do { } while (0) #define vstate_restore(task, regs) do { } while (0) #define __switch_to_vector(__prev, __next) do { } while (0) diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index fb485c9bceee..009ab4849fce 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -84,7 +84,15 @@ void start_thread(struct pt_regs *regs, unsigned long pc, } if (has_vector) { + struct __riscv_v_state *vstate = &(current->thread.vstate); + + /* Enable vector and allocate memory for vector registers. */ + vstate->datap = kzalloc(riscv_vsize, GFP_KERNEL); + if (WARN_ON(!vstate->datap)) + return; + vstate->size = riscv_vsize; regs->status |= SR_VS_INITIAL; + /* * Restore the initial value to the vector register * before starting the user program. -- 2.28.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBDBBC2D0A7 for ; Thu, 10 Sep 2020 08:13:45 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 519C320872 for ; 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[114.34.229.221]) by smtp.gmail.com with ESMTPSA id e1sm2196056pfl.162.2020.09.10.01.13.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Sep 2020 01:13:18 -0700 (PDT) From: Greentime Hu To: greentime.hu@sifive.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu, palmer@dabbelt.com, paul.walmsley@sifive.com Subject: [RFC PATCH v7 20/21] riscv: Allocate space for vector registers in start_thread() Date: Thu, 10 Sep 2020 16:12:15 +0800 Message-Id: <1b09427788749bf7b5e35c771657661bd7165348.1599719352.git.greentime.hu@sifive.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200910_041320_795600_AE162827 X-CRM114-Status: GOOD ( 14.35 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vincent Chen Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org It allocates memory space for vector registers in start_thread() instead of allocating in vstate_restore() in this patch. We can allocate memory here so that it will be more readable. Signed-off-by: Greentime Hu Signed-off-by: Vincent Chen --- arch/riscv/include/asm/switch_to.h | 7 +------ arch/riscv/kernel/process.c | 8 ++++++++ 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h index d33a86a48f0d..58898d33bf28 100644 --- a/arch/riscv/include/asm/switch_to.h +++ b/arch/riscv/include/asm/switch_to.h @@ -98,12 +98,6 @@ static inline void vstate_restore(struct task_struct *task, { if ((regs->status & SR_VS) != SR_VS_OFF) { struct __riscv_v_state *vstate = &(task->thread.vstate); - - /* Allocate space for vector registers. */ - if (!vstate->datap) { - vstate->datap = kzalloc(riscv_vsize, GFP_ATOMIC); - vstate->size = riscv_vsize; - } __vstate_restore(vstate, vstate->datap); __vstate_clean(regs); } @@ -122,6 +116,7 @@ static inline void __switch_to_vector(struct task_struct *prev, #else #define has_vector false +#define riscv_vsize (0) #define vstate_save(task, regs) do { } while (0) #define vstate_restore(task, regs) do { } while (0) #define __switch_to_vector(__prev, __next) do { } while (0) diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index fb485c9bceee..009ab4849fce 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -84,7 +84,15 @@ void start_thread(struct pt_regs *regs, unsigned long pc, } if (has_vector) { + struct __riscv_v_state *vstate = &(current->thread.vstate); + + /* Enable vector and allocate memory for vector registers. */ + vstate->datap = kzalloc(riscv_vsize, GFP_KERNEL); + if (WARN_ON(!vstate->datap)) + return; + vstate->size = riscv_vsize; regs->status |= SR_VS_INITIAL; + /* * Restore the initial value to the vector register * before starting the user program. -- 2.28.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv