On Tue, Nov 17, 2015 at 11:40:04AM +1100, Benjamin Herrenschmidt wrote:
> On Tue, 2015-11-17 at 11:32 +1100, Alexey Kardashevskiy wrote:
> > On 11/11/2015 11:27 AM, Benjamin Herrenschmidt wrote:
> > > This adds a model of the POWER8 LPC controller. It is then used
> > > by the PowerNV code to attach a UART and RTC, which, with the right
> > > version of OPAL firmware, will provide a working console.
> > > 
> > > This version of the LPC controller model doesn't yet implement
> > > support for the SerIRQ deserializer present in the Naples version
> > > of the chip though some preliminary work is there.
> > > 
> > 
> > Is this LPC controller one per a chip or per a machine?
> 
> Per chip but we usually only wire one up per machine.
> 
> > In general it is quite nice when "-nodefaults" does not create
> > neither PHB nor LPC so the user can add them manually with parameters
> > different than defaults.
> 
> In this case though, PHB and LPC bridges are all part of the P8 chip,
> and I'm trying to represent that topology as best as possible.
> 
> I think "-nodefaults" for Pnv should only be about the devices we
> attach to the LPC/PHB not the busses themselves.

Exactly what is and isn't covered by -nodefaults is a bit of a mess -
part of the topic of my talk at KVM Forum.

But on the whole I agree with you, since the LPC is part of the P8
chip, I think it makes sense to include it even with -nodefaults.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson