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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>,
	x86@kernel.org, Borislav Petkov <bp@alien8.de>,
	Stephane Eranian <eranian@google.com>,
	Harish Chegondi <harish.chegondi@intel.com>,
	Kan Liang <kan.liang@intel.com>,
	Andi Kleen <andi.kleen@intel.com>,
	Jacob Pan <jacob.jun.pan@linux.intel.com>
Subject: [patch V3 11/28] x86/topology: Create logical package id
Date: Mon, 22 Feb 2016 22:19:15 -0000	[thread overview]
Message-ID: <20160222221011.541071755@linutronix.de> (raw)
In-Reply-To: 20160222220733.632098221@linutronix.de

[-- Attachment #1: x86-topology--Create-logical-package-id.patch --]
[-- Type: text/plain, Size: 7660 bytes --]

For per package oriented services we must be able to rely on the number of cpu
packages to be within bounds. Create a tracking facility, which

- calculates the number of possible packages depending on nr_cpu_ids after
  boot

- makes sure that the package id is within the number of possible packages. If
  the apic id is outside we map it to a logical package id if there is enough
  space available.

Provide interfaces for drivers to query the mapping and do translations from
physcial to logical ids.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/processor.h |    2 
 arch/x86/include/asm/topology.h  |   10 +++
 arch/x86/kernel/apic/apic.c      |   14 +++++
 arch/x86/kernel/cpu/common.c     |    2 
 arch/x86/kernel/cpu/intel.c      |   13 +++++
 arch/x86/kernel/smpboot.c        |  100 +++++++++++++++++++++++++++++++++++++++
 6 files changed, 141 insertions(+)

--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -129,6 +129,8 @@ struct cpuinfo_x86 {
 	u16			booted_cores;
 	/* Physical processor id: */
 	u16			phys_proc_id;
+	/* Logical processor id: */
+	u16			logical_proc_id;
 	/* Core id: */
 	u16			cpu_core_id;
 	/* Compute unit id */
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -119,12 +119,22 @@ static inline void setup_node_to_cpumask
 
 extern const struct cpumask *cpu_coregroup_mask(int cpu);
 
+#define topology_logical_package_id(cpu)	(cpu_data(cpu).logical_proc_id)
 #define topology_physical_package_id(cpu)	(cpu_data(cpu).phys_proc_id)
 #define topology_core_id(cpu)			(cpu_data(cpu).cpu_core_id)
 
 #ifdef ENABLE_TOPO_DEFINES
 #define topology_core_cpumask(cpu)		(per_cpu(cpu_core_map, cpu))
 #define topology_sibling_cpumask(cpu)		(per_cpu(cpu_sibling_map, cpu))
+
+extern unsigned int __max_logical_packages;
+#define topology_max_packages()			(__max_logical_packages)
+int topology_update_package_map(unsigned int apicid, unsigned int cpu);
+extern int topology_phys_to_logical_pkg(unsigned int pkg);
+#else
+#define topology_max_packages()			(1)
+static inline int
+topology_update_package_map(unsigned int apicid, unsigned int cpu) { return 0; }
 #endif
 
 static inline void arch_fix_phys_package_id(int num, u32 slot)
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -2078,6 +2078,20 @@ int generic_processor_info(int apicid, i
 		cpu = cpumask_next_zero(-1, cpu_present_mask);
 
 	/*
+	 * This can happen on physical hotplug. The sanity check at boot time
+	 * is done from native_smp_prepare_cpus() after num_possible_cpus() is
+	 * established.
+	 */
+	if (topology_update_package_map(apicid, cpu) < 0) {
+		int thiscpu = max + disabled_cpus;
+
+		pr_warning("ACPI: Package limit reached. Processor %d/0x%x ignored.\n",
+			   thiscpu, apicid);
+		disabled_cpus++;
+		return -ENOSPC;
+	}
+
+	/*
 	 * Validate version
 	 */
 	if (version == 0x0) {
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -977,6 +977,8 @@ static void identify_cpu(struct cpuinfo_
 #ifdef CONFIG_NUMA
 	numa_add_cpu(smp_processor_id());
 #endif
+	/* The boot/hotplug time assigment got cleared, restore it */
+	c->logical_proc_id = topology_phys_to_logical_pkg(c->phys_proc_id);
 }
 
 /*
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -160,6 +160,19 @@ static void early_init_intel(struct cpui
 		pr_info("Disabling PGE capability bit\n");
 		setup_clear_cpu_cap(X86_FEATURE_PGE);
 	}
+
+	if (c->cpuid_level >= 0x00000001) {
+		u32 eax, ebx, ecx, edx;
+
+		cpuid(0x00000001, &eax, &ebx, &ecx, &edx);
+		/*
+		 * If HTT (EDX[28]) is set EBX[16:23] contain the number of
+		 * apicids which are reserved per package. Store the resulting
+		 * shift value for the package management code.
+		 */
+		if (edx & (1U << 28))
+			c->x86_coreid_bits = get_count_order((ebx >> 16) & 0xff);
+	}
 }
 
 #ifdef CONFIG_X86_32
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -97,6 +97,14 @@ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t
 DEFINE_PER_CPU_READ_MOSTLY(struct cpuinfo_x86, cpu_info);
 EXPORT_PER_CPU_SYMBOL(cpu_info);
 
+/* Logical package management. We might want to allocate that dynamically */
+static int *physical_to_logical_pkg __read_mostly;
+static unsigned long *physical_package_map __read_mostly;;
+static unsigned long *logical_package_map  __read_mostly;
+static unsigned int max_physical_pkg_id __read_mostly;
+unsigned int __max_logical_packages __read_mostly;
+EXPORT_SYMBOL(__max_logical_packages);
+
 static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
 {
 	unsigned long flags;
@@ -251,6 +259,97 @@ static void notrace start_secondary(void
 	cpu_startup_entry(CPUHP_ONLINE);
 }
 
+int topology_update_package_map(unsigned int apicid, unsigned int cpu)
+{
+	unsigned int new, pkg = apicid >> boot_cpu_data.x86_coreid_bits;
+
+	/* Called from early boot ? */
+	if (!physical_package_map)
+		return 0;
+
+	if (pkg >= max_physical_pkg_id)
+		return -EINVAL;
+
+	/* Set the logical package id */
+	if (test_and_set_bit(pkg, physical_package_map))
+		goto found;
+
+	if (pkg < __max_logical_packages) {
+		set_bit(pkg, logical_package_map);
+		physical_to_logical_pkg[pkg] = pkg;
+		goto found;
+	}
+	new = find_first_zero_bit(logical_package_map, __max_logical_packages);
+	if (new >= __max_logical_packages) {
+		physical_to_logical_pkg[pkg] = -1;
+		pr_warn("APIC(%x) Package %u exceeds logical package map\n",
+			apicid, pkg);
+		return -ENOSPC;
+	}
+	set_bit(new, logical_package_map);
+	pr_info("APIC(%x) Converting physical %u to logical package %u\n",
+		apicid, pkg, new);
+	physical_to_logical_pkg[pkg] = new;
+
+found:
+	cpu_data(cpu).logical_proc_id = physical_to_logical_pkg[pkg];
+	return 0;
+}
+
+/**
+ * topology_phys_to_logical_pkg - Map a physical package id to a logical
+ *
+ * Returns logical package id or -1 if not found
+ */
+int topology_phys_to_logical_pkg(unsigned int phys_pkg)
+{
+	if (phys_pkg >= max_physical_pkg_id)
+		return -1;
+	return physical_to_logical_pkg[phys_pkg];
+}
+EXPORT_SYMBOL(topology_phys_to_logical_pkg);
+
+static void __init smp_init_package_map(void)
+{
+	unsigned int ncpus, cpu;
+	size_t size;
+
+	/*
+	 * Today neither Intel nor AMD support heterogenous systems. That
+	 * might change in the future....
+	 */
+	ncpus = boot_cpu_data.x86_max_cores * smp_num_siblings;
+	__max_logical_packages = DIV_ROUND_UP(nr_cpu_ids, ncpus);
+
+	/*
+	 * Possibly larger than what we need as the number of apic ids per
+	 * package can be smaller than the actual used apic ids.
+	 */
+	max_physical_pkg_id = DIV_ROUND_UP(MAX_LOCAL_APIC, ncpus);
+	size = max_physical_pkg_id * sizeof(unsigned int);
+	physical_to_logical_pkg = kmalloc(size, GFP_KERNEL);
+	memset(physical_to_logical_pkg, 0xff, size);
+	size = BITS_TO_LONGS(max_physical_pkg_id);
+	physical_package_map = kzalloc(size, GFP_KERNEL);
+	size = BITS_TO_LONGS(__max_logical_packages);
+	logical_package_map = kzalloc(size, GFP_KERNEL);
+
+	pr_info("Max logical packages: %u\n", __max_logical_packages);
+
+	for_each_present_cpu(cpu) {
+		unsigned int apicid = apic->cpu_present_to_apicid(cpu);
+
+		if (apicid == BAD_APICID || !apic->apic_id_valid(apicid))
+			continue;
+		if (!topology_update_package_map(apicid, cpu))
+			continue;
+		pr_warn("CPU %u APICId %x disabled\n", cpu, apicid);
+		per_cpu(x86_bios_cpu_apicid, cpu) = BAD_APICID;
+		set_cpu_possible(cpu, false);
+		set_cpu_present(cpu, false);
+	}
+}
+
 void __init smp_store_boot_cpu_info(void)
 {
 	int id = 0; /* CPU 0 */
@@ -258,6 +357,7 @@ void __init smp_store_boot_cpu_info(void
 
 	*c = boot_cpu_data;
 	c->cpu_index = id;
+	smp_init_package_map();
 }
 
 /*

  parent reply	other threads:[~2016-02-22 22:25 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-22 22:19 [patch V3 00/28] x86/perf/intel/uncore|rapl: Fix error handling and sanitize pmu management Thomas Gleixner
2016-02-22 22:19 ` [patch V3 01/28] x86/perf/intel/uncore: Remove pointless mask check Thomas Gleixner
2016-02-29 11:03   ` [tip:perf/core] perf/x86/intel/uncore: " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 02/28] x86/perf/intel/uncore: Simplify error rollback Thomas Gleixner
2016-02-29 11:03   ` [tip:perf/core] perf/x86/intel/uncore: " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 03/28] x86/perf/intel/uncore: Fix error handling Thomas Gleixner
2016-02-29 11:04   ` [tip:perf/core] perf/x86/intel/uncore: " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 04/28] x86/perf/intel/uncore: Add sanity checks for pci dev package id Thomas Gleixner
2016-02-29 11:04   ` [tip:perf/core] perf/x86/intel/uncore: Add sanity checks for PCI " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 05/28] x86/perf/intel_uncore: Cleanup hardware on exit Thomas Gleixner
2016-02-29 11:05   ` [tip:perf/core] perf/x86/intel/uncore: Clean up " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 06/28] x86/perf/intel/uncore: Drop pointless hotplug priority Thomas Gleixner
2016-02-22 22:19 ` [patch V3 07/28] x86/perf/intel_uncore: Make code readable Thomas Gleixner
2016-02-29 11:05   ` [tip:perf/core] perf/x86/intel/uncore: Make code more readable tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 08/28] x86/perf/uncore: Make uncore_pcibus_to_physid static Thomas Gleixner
2016-02-29 11:06   ` [tip:perf/core] perf/x86/uncore: Make uncore_pcibus_to_physid() static tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 09/28] perf: Allow storage of pmu private data in event Thomas Gleixner
2016-02-29 11:06   ` [tip:perf/core] perf: Allow storage of PMU " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 10/28] x86/perf/intel_uncore: Store box in event->pmu_private Thomas Gleixner
2016-02-29 11:06   ` [tip:perf/core] perf/x86/intel/uncore: " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` Thomas Gleixner [this message]
2016-02-29 11:07   ` [tip:perf/core] x86/topology: Create logical package id tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 12/28] x86/perf/uncore: Track packages not per cpu data Thomas Gleixner
2016-02-29 11:07   ` [tip:perf/core] perf/x86/uncore: Track packages, not per CPU data tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 13/28] x86/perf/intel_uncore: Clear all hardware state on exit Thomas Gleixner
2016-02-29 11:08   ` [tip:perf/core] perf/x86/intel/uncore: " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 14/28] x86/perf/intel_uncore: Make PCI and MSR uncore independent Thomas Gleixner
2016-02-29 11:08   ` [tip:perf/core] perf/x86/intel/uncore: " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 15/28] cpumask: Export cpumask_any_but Thomas Gleixner
2016-02-29 11:08   ` [tip:perf/core] cpumask: Export cpumask_any_but() tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 16/28] x86/perf/intel_uncore: Make it modular Thomas Gleixner
2016-02-22 22:19 ` [patch V3 17/28] x86/perf/cqm: Get rid of the silly for_each_cpu lookups Thomas Gleixner
2016-02-29 11:09   ` [tip:perf/core] perf/x86/intel/cqm: Get rid of the silly for_each_cpu() lookups tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 18/28] x86/perf/intel_rapl: Make Knights Landings support functional Thomas Gleixner
2016-02-29 11:09   ` [tip:perf/core] perf/x86/intel/rapl: " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 19/28] x86/perf/intel/rapl: Add proper error handling Thomas Gleixner
2016-02-29 11:10   ` [tip:perf/core] perf/x86/intel/rapl: " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 21/28] x86/perf/intel/rapl: Calculate timing once Thomas Gleixner
2016-02-29 11:10   ` [tip:perf/core] perf/x86/intel/rapl: " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 20/28] x86/perf/intel/rapl: Sanitize the quirk handling Thomas Gleixner
2016-02-29 11:10   ` [tip:perf/core] perf/x86/intel/rapl: " tip-bot for Thomas Gleixner
2016-03-04 17:49     ` Borislav Petkov
2016-03-08 16:04       ` Ingo Molnar
2016-03-08 16:40         ` [PATCH] perf/x86/intel/rapl: Simplify quirk handling even more Borislav Petkov
2016-03-08 17:36           ` [tip:perf/core] " tip-bot for Borislav Petkov
2016-02-22 22:19 ` [patch V3 22/28] x86/perf/intel/rapl: Cleanup the printk output Thomas Gleixner
2016-02-29 11:11   ` [tip:perf/core] perf/x86/intel/rapl: Clean up " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 23/28] x86/perf/intel/rapl: Refactor code some more Thomas Gleixner
2016-02-29 11:11   ` [tip:perf/core] perf/x86/intel/rapl: Refactor the " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 25/28] x86/perf/intel/rapl: Utilize event->pmu_private Thomas Gleixner
2016-02-29 11:12   ` [tip:perf/core] perf/x86/intel/rapl: " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 24/28] x86/perf/intel/rapl: Make pmu lock raw Thomas Gleixner
2016-02-29 11:12   ` [tip:perf/core] perf/x86/intel/rapl: Make PMU " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 26/28] x86/perf/intel/rapl: Convert it to a per package facility Thomas Gleixner
2016-02-29 11:12   ` [tip:perf/core] perf/x86/intel/rapl: " tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 27/28] perf: Export perf_event_sysfs_show Thomas Gleixner
2016-02-29 11:13   ` [tip:perf/core] perf: Export perf_event_sysfs_show() tip-bot for Thomas Gleixner
2016-02-22 22:19 ` [patch V3 28/28] x86/perf/intel/rapl: Make it modular Thomas Gleixner

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