Re: [PATCH v2 3/5] drm/i915: Change the placement of some static functions in intel_dp.c

[Manasi Navare <manasi.d.navare@intel.com>]

On Thu, Sep 15, 2016 at 10:41:23AM +0300, Mika Kahola wrote:
> On Tue, 2016-09-13 at 18:08 -0700, Manasi Navare wrote:
> > These static helper functions are required to be used within upfront
> > link training related functions so they need to be placed at the top
> > of the file. It also changes macro dev to dev_priv.
> > 
> We could split this patch into two parts. One being moving around the
> helper functions and the other one cleanup patch to change dev in favor
> of dev_priv.
>

It was just one place for changing dev to dev_priv. But sure I can
add a separate patch for that.

Manasi 
> > v2:
> > * Dont move around functions declared in intel_drv.h (Rodrigo Vivi)
> > 
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_dp.c | 158 ++++++++++++++++++++--------
> > ------------
> >  1 file changed, 79 insertions(+), 79 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c
> > index 07f9a49..a319102 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -190,6 +190,81 @@ intel_dp_max_data_rate(int max_link_clock, int
> > max_lanes)
> >  	return (max_link_clock * max_lanes * 8) / 10;
> >  }
> >  
> > +static int
> > +intel_dp_sink_rates(struct intel_dp *intel_dp, const int
> > **sink_rates)
> > +{
> > +	if (intel_dp->num_sink_rates) {
> > +		*sink_rates = intel_dp->sink_rates;
> > +		return intel_dp->num_sink_rates;
> > +	}
> > +
> > +	*sink_rates = default_rates;
> > +
> > +	return (intel_dp_max_link_bw(intel_dp) >> 3) + 1;
> > +}
> > +
> > +static int
> > +intel_dp_source_rates(struct intel_dp *intel_dp, const int
> > **source_rates)
> > +{
> > +	struct intel_digital_port *dig_port =
> > dp_to_dig_port(intel_dp);
> > +	struct drm_i915_private *dev_priv = to_i915(dig_port-
> > >base.base.dev);
> > +	int size;
> > +
> > +	if (IS_BROXTON(dev_priv)) {
> > +		*source_rates = bxt_rates;
> > +		size = ARRAY_SIZE(bxt_rates);
> > +	} else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
> > +		*source_rates = skl_rates;
> > +		size = ARRAY_SIZE(skl_rates);
> > +	} else {
> > +		*source_rates = default_rates;
> > +		size = ARRAY_SIZE(default_rates);
> > +	}
> > +
> > +	/* This depends on the fact that 5.4 is last value in the
> > array */
> > +	if (!intel_dp_source_supports_hbr2(intel_dp))
> > +		size--;
> > +
> > +	return size;
> > +}
> > +
> > +static int intersect_rates(const int *source_rates, int source_len,
> > +			   const int *sink_rates, int sink_len,
> > +			   int *common_rates)
> > +{
> > +	int i = 0, j = 0, k = 0;
> > +
> > +	while (i < source_len && j < sink_len) {
> > +		if (source_rates[i] == sink_rates[j]) {
> > +			if (WARN_ON(k >= DP_MAX_SUPPORTED_RATES))
> > +				return k;
> > +			common_rates[k] = source_rates[i];
> > +			++k;
> > +			++i;
> > +			++j;
> > +		} else if (source_rates[i] < sink_rates[j]) {
> > +			++i;
> > +		} else {
> > +			++j;
> > +		}
> > +	}
> > +	return k;
> > +}
> > +
> > +static int intel_dp_common_rates(struct intel_dp *intel_dp,
> > +				 int *common_rates)
> > +{
> > +	const int *source_rates, *sink_rates;
> > +	int source_len, sink_len;
> > +
> > +	sink_len = intel_dp_sink_rates(intel_dp, &sink_rates);
> > +	source_len = intel_dp_source_rates(intel_dp, &source_rates);
> > +
> > +	return intersect_rates(source_rates, source_len,
> > +			       sink_rates, sink_len,
> > +			       common_rates);
> > +}
> > +
> >  static enum drm_mode_status
> >  intel_dp_mode_valid(struct drm_connector *connector,
> >  		    struct drm_display_mode *mode)
> > @@ -1256,60 +1331,22 @@ intel_dp_aux_init(struct intel_dp *intel_dp,
> > struct intel_connector *connector)
> >  	intel_dp->aux.transfer = intel_dp_aux_transfer;
> >  }
> >  
> > -static int
> > -intel_dp_sink_rates(struct intel_dp *intel_dp, const int
> > **sink_rates)
> > -{
> > -	if (intel_dp->num_sink_rates) {
> > -		*sink_rates = intel_dp->sink_rates;
> > -		return intel_dp->num_sink_rates;
> > -	}
> > -
> > -	*sink_rates = default_rates;
> > -
> > -	return (intel_dp_max_link_bw(intel_dp) >> 3) + 1;
> > -}
> > -
> >  bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp)
> >  {
> >  	struct intel_digital_port *dig_port =
> > dp_to_dig_port(intel_dp);
> > -	struct drm_device *dev = dig_port->base.base.dev;
> > +	struct drm_i915_private *dev_priv = to_i915(dig_port-
> > >base.base.dev);
> >  
> >  	/* WaDisableHBR2:skl */
> > -	if (IS_SKL_REVID(dev, 0, SKL_REVID_B0))
> > +	if (IS_SKL_REVID(dev_priv, 0, SKL_REVID_B0))
> >  		return false;
> >  
> > -	if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) ||
> > IS_BROADWELL(dev) ||
> > -	    (INTEL_INFO(dev)->gen >= 9))
> > +	if ((IS_HASWELL(dev_priv) && !IS_HSW_ULX(dev_priv)) ||
> > +	    IS_BROADWELL(dev_priv) || (INTEL_GEN(dev_priv) >= 9))
> >  		return true;
> >  	else
> >  		return false;
> >  }
> >  
> > -static int
> > -intel_dp_source_rates(struct intel_dp *intel_dp, const int
> > **source_rates)
> > -{
> > -	struct intel_digital_port *dig_port =
> > dp_to_dig_port(intel_dp);
> > -	struct drm_device *dev = dig_port->base.base.dev;
> > -	int size;
> > -
> > -	if (IS_BROXTON(dev)) {
> > -		*source_rates = bxt_rates;
> > -		size = ARRAY_SIZE(bxt_rates);
> > -	} else if (IS_SKYLAKE(dev) || IS_KABYLAKE(dev)) {
> > -		*source_rates = skl_rates;
> > -		size = ARRAY_SIZE(skl_rates);
> > -	} else {
> > -		*source_rates = default_rates;
> > -		size = ARRAY_SIZE(default_rates);
> > -	}
> > -
> > -	/* This depends on the fact that 5.4 is last value in the
> > array */
> > -	if (!intel_dp_source_supports_hbr2(intel_dp))
> > -		size--;
> > -
> > -	return size;
> > -}
> > -
> >  static void
> >  intel_dp_set_clock(struct intel_encoder *encoder,
> >  		   struct intel_crtc_state *pipe_config)
> > @@ -1343,43 +1380,6 @@ intel_dp_set_clock(struct intel_encoder
> > *encoder,
> >  	}
> >  }
> >  
> > -static int intersect_rates(const int *source_rates, int source_len,
> > -			   const int *sink_rates, int sink_len,
> > -			   int *common_rates)
> > -{
> > -	int i = 0, j = 0, k = 0;
> > -
> > -	while (i < source_len && j < sink_len) {
> > -		if (source_rates[i] == sink_rates[j]) {
> > -			if (WARN_ON(k >= DP_MAX_SUPPORTED_RATES))
> > -				return k;
> > -			common_rates[k] = source_rates[i];
> > -			++k;
> > -			++i;
> > -			++j;
> > -		} else if (source_rates[i] < sink_rates[j]) {
> > -			++i;
> > -		} else {
> > -			++j;
> > -		}
> > -	}
> > -	return k;
> > -}
> > -
> > -static int intel_dp_common_rates(struct intel_dp *intel_dp,
> > -				 int *common_rates)
> > -{
> > -	const int *source_rates, *sink_rates;
> > -	int source_len, sink_len;
> > -
> > -	sink_len = intel_dp_sink_rates(intel_dp, &sink_rates);
> > -	source_len = intel_dp_source_rates(intel_dp, &source_rates);
> > -
> > -	return intersect_rates(source_rates, source_len,
> > -			       sink_rates, sink_len,
> > -			       common_rates);
> > -}
> > -
> >  static void snprintf_int_array(char *str, size_t len,
> >  			       const int *array, int nelem)
> >  {
> -- 
> Mika Kahola - Intel OTC
> 
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