diff for duplicates of <20161117171131.20062-5-thierry.reding@gmail.com>
diff --git a/a/1.txt b/N1/1.txt
index 335fe0c..58310bc 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,10 +1,10 @@
-From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+From: Thierry Reding <treding@nvidia.com>
Tegra186 has a total of four SDHCI controllers that each support SD 4.2
(up to UHS-I speed), SDIO 4.1 (up to UHS-I speed), eSD 2.1, eMMC 5.1 and
SDHOST 4.1 (up to UHS-I speed).
-Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+Signed-off-by: Thierry Reding <treding@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 44 ++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
@@ -17,7 +17,7 @@ index b1a77d78d202..1aca69f24fb0 100644
status = "disabled";
};
-+ sdmmc1: sdhci@3400000 {
++ sdmmc1: sdhci at 3400000 {
+ compatible = "nvidia,tegra186-sdhci";
+ reg = <0x0 0x03400000 0x0 0x10000>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
@@ -28,7 +28,7 @@ index b1a77d78d202..1aca69f24fb0 100644
+ status = "disabled";
+ };
+
-+ sdmmc2: sdhci@3420000 {
++ sdmmc2: sdhci at 3420000 {
+ compatible = "nvidia,tegra186-sdhci";
+ reg = <0x0 0x03420000 0x0 0x10000>;
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
@@ -39,7 +39,7 @@ index b1a77d78d202..1aca69f24fb0 100644
+ status = "disabled";
+ };
+
-+ sdmmc3: sdhci@3440000 {
++ sdmmc3: sdhci at 3440000 {
+ compatible = "nvidia,tegra186-sdhci";
+ reg = <0x0 0x03440000 0x0 0x10000>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
@@ -50,7 +50,7 @@ index b1a77d78d202..1aca69f24fb0 100644
+ status = "disabled";
+ };
+
-+ sdmmc4: sdhci@3460000 {
++ sdmmc4: sdhci at 3460000 {
+ compatible = "nvidia,tegra186-sdhci";
+ reg = <0x0 0x03460000 0x0 0x10000>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
@@ -61,7 +61,7 @@ index b1a77d78d202..1aca69f24fb0 100644
+ status = "disabled";
+ };
+
- gic: interrupt-controller@3881000 {
+ gic: interrupt-controller at 3881000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
--
diff --git a/a/content_digest b/N1/content_digest
index 2dd4e73..8e9336b 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,10 +2,7 @@
"ref\00020161117171131.20062-1-thierry.reding\@gmail.com\0"
]
[
- "ref\00020161117171131.20062-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w\@public.gmane.org\0"
-]
-[
- "From\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w\@public.gmane.org>\0"
+ "From\0thierry.reding\@gmail.com (Thierry Reding)\0"
]
[
"Subject\0[PATCH 5/9] arm64: tegra: Add SDHCI controllers on Tegra186\0"
@@ -14,14 +11,7 @@
"Date\0Thu, 17 Nov 2016 18:11:27 +0100\0"
]
[
- "To\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w\@public.gmane.org>\0"
-]
-[
- "Cc\0Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>",
- " Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>",
- " Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q\@public.gmane.org>",
- " linux-tegra-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org",
- " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r\@public.gmane.org\0"
+ "To\0linux-arm-kernel\@lists.infradead.org\0"
]
[
"\0000:1\0"
@@ -30,13 +20,13 @@
"b\0"
]
[
- "From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>\n",
+ "From: Thierry Reding <treding\@nvidia.com>\n",
"\n",
"Tegra186 has a total of four SDHCI controllers that each support SD 4.2\n",
"(up to UHS-I speed), SDIO 4.1 (up to UHS-I speed), eSD 2.1, eMMC 5.1 and\n",
"SDHOST 4.1 (up to UHS-I speed).\n",
"\n",
- "Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>\n",
+ "Signed-off-by: Thierry Reding <treding\@nvidia.com>\n",
"---\n",
" arch/arm64/boot/dts/nvidia/tegra186.dtsi | 44 ++++++++++++++++++++++++++++++++\n",
" 1 file changed, 44 insertions(+)\n",
@@ -49,7 +39,7 @@
" \t\tstatus = \"disabled\";\n",
" \t};\n",
" \n",
- "+\tsdmmc1: sdhci\@3400000 {\n",
+ "+\tsdmmc1: sdhci at 3400000 {\n",
"+\t\tcompatible = \"nvidia,tegra186-sdhci\";\n",
"+\t\treg = <0x0 0x03400000 0x0 0x10000>;\n",
"+\t\tinterrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -60,7 +50,7 @@
"+\t\tstatus = \"disabled\";\n",
"+\t};\n",
"+\n",
- "+\tsdmmc2: sdhci\@3420000 {\n",
+ "+\tsdmmc2: sdhci at 3420000 {\n",
"+\t\tcompatible = \"nvidia,tegra186-sdhci\";\n",
"+\t\treg = <0x0 0x03420000 0x0 0x10000>;\n",
"+\t\tinterrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -71,7 +61,7 @@
"+\t\tstatus = \"disabled\";\n",
"+\t};\n",
"+\n",
- "+\tsdmmc3: sdhci\@3440000 {\n",
+ "+\tsdmmc3: sdhci at 3440000 {\n",
"+\t\tcompatible = \"nvidia,tegra186-sdhci\";\n",
"+\t\treg = <0x0 0x03440000 0x0 0x10000>;\n",
"+\t\tinterrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -82,7 +72,7 @@
"+\t\tstatus = \"disabled\";\n",
"+\t};\n",
"+\n",
- "+\tsdmmc4: sdhci\@3460000 {\n",
+ "+\tsdmmc4: sdhci at 3460000 {\n",
"+\t\tcompatible = \"nvidia,tegra186-sdhci\";\n",
"+\t\treg = <0x0 0x03460000 0x0 0x10000>;\n",
"+\t\tinterrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;\n",
@@ -93,11 +83,11 @@
"+\t\tstatus = \"disabled\";\n",
"+\t};\n",
"+\n",
- " \tgic: interrupt-controller\@3881000 {\n",
+ " \tgic: interrupt-controller at 3881000 {\n",
" \t\tcompatible = \"arm,gic-400\";\n",
" \t\t#interrupt-cells = <3>;\n",
"-- \n",
"2.10.2"
]
-761499d797d3900611ed4d457285db3adcdc6049b5ed105be70b1c4948958ff0
+6a79c3d4518173bc26e5b365e6f1f4323a49b983a0bf609f9ff9af8a742ebceb
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