diff for duplicates of <20161117171131.20062-6-thierry.reding@gmail.com>
diff --git a/a/1.txt b/N1/1.txt
index 8dbef54..1d8ae07 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,11 +1,11 @@
-From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+From: Thierry Reding <treding@nvidia.com>
Tegra186 has two GPIO controllers that are no longer compatible with the
controller found on earlier generations. One of these controllers exists
in an always-on partition of the SoC whereas the other can be clock- and
powergated.
-Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+Signed-off-by: Thierry Reding <treding@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
@@ -24,7 +24,7 @@ index 1aca69f24fb0..62fa85ae0271 100644
#address-cells = <2>;
#size-cells = <2>;
-+ gpio: gpio@2200000 {
++ gpio: gpio at 2200000 {
+ compatible = "nvidia,tegra186-gpio";
+ reg-names = "security", "gpio";
+ reg = <0x0 0x2200000 0x0 0x10000>,
@@ -41,14 +41,14 @@ index 1aca69f24fb0..62fa85ae0271 100644
+ gpio-controller;
+ };
+
- uarta: serial@3100000 {
+ uarta: serial at 3100000 {
compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart";
reg = <0x0 0x03100000 0x0 0x40>;
@@ -277,6 +295,18 @@
status = "disabled";
};
-+ gpio_aon: gpio@c2f0000 {
++ gpio_aon: gpio at c2f0000 {
+ compatible = "nvidia,tegra186-gpio-aon";
+ reg-names = "security", "gpio";
+ reg = <0x0 0xc2f0000 0x0 0x1000>,
@@ -60,7 +60,7 @@ index 1aca69f24fb0..62fa85ae0271 100644
+ #interrupt-cells = <2>;
+ };
+
- sysram@30000000 {
+ sysram at 30000000 {
compatible = "nvidia,tegra186-sysram", "mmio-sram";
reg = <0x0 0x30000000 0x0 0x50000>;
--
diff --git a/a/content_digest b/N1/content_digest
index 0d04947..96828ae 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,10 +2,7 @@
"ref\00020161117171131.20062-1-thierry.reding\@gmail.com\0"
]
[
- "ref\00020161117171131.20062-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w\@public.gmane.org\0"
-]
-[
- "From\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w\@public.gmane.org>\0"
+ "From\0thierry.reding\@gmail.com (Thierry Reding)\0"
]
[
"Subject\0[PATCH 6/9] arm64: tegra: Add GPIO controllers on Tegra186\0"
@@ -14,14 +11,7 @@
"Date\0Thu, 17 Nov 2016 18:11:28 +0100\0"
]
[
- "To\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w\@public.gmane.org>\0"
-]
-[
- "Cc\0Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>",
- " Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>",
- " Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q\@public.gmane.org>",
- " linux-tegra-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org",
- " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r\@public.gmane.org\0"
+ "To\0linux-arm-kernel\@lists.infradead.org\0"
]
[
"\0000:1\0"
@@ -30,14 +20,14 @@
"b\0"
]
[
- "From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>\n",
+ "From: Thierry Reding <treding\@nvidia.com>\n",
"\n",
"Tegra186 has two GPIO controllers that are no longer compatible with the\n",
"controller found on earlier generations. One of these controllers exists\n",
"in an always-on partition of the SoC whereas the other can be clock- and\n",
"powergated.\n",
"\n",
- "Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>\n",
+ "Signed-off-by: Thierry Reding <treding\@nvidia.com>\n",
"---\n",
" arch/arm64/boot/dts/nvidia/tegra186.dtsi | 30 ++++++++++++++++++++++++++++++\n",
" 1 file changed, 30 insertions(+)\n",
@@ -56,7 +46,7 @@
" \t#address-cells = <2>;\n",
" \t#size-cells = <2>;\n",
" \n",
- "+\tgpio: gpio\@2200000 {\n",
+ "+\tgpio: gpio at 2200000 {\n",
"+\t\tcompatible = \"nvidia,tegra186-gpio\";\n",
"+\t\treg-names = \"security\", \"gpio\";\n",
"+\t\treg = <0x0 0x2200000 0x0 0x10000>,\n",
@@ -73,14 +63,14 @@
"+\t\tgpio-controller;\n",
"+\t};\n",
"+\n",
- " \tuarta: serial\@3100000 {\n",
+ " \tuarta: serial at 3100000 {\n",
" \t\tcompatible = \"nvidia,tegra186-uart\", \"nvidia,tegra20-uart\";\n",
" \t\treg = <0x0 0x03100000 0x0 0x40>;\n",
"\@\@ -277,6 +295,18 \@\@\n",
" \t\tstatus = \"disabled\";\n",
" \t};\n",
" \n",
- "+\tgpio_aon: gpio\@c2f0000 {\n",
+ "+\tgpio_aon: gpio at c2f0000 {\n",
"+\t\tcompatible = \"nvidia,tegra186-gpio-aon\";\n",
"+\t\treg-names = \"security\", \"gpio\";\n",
"+\t\treg = <0x0 0xc2f0000 0x0 0x1000>,\n",
@@ -92,11 +82,11 @@
"+\t\t#interrupt-cells = <2>;\n",
"+\t};\n",
"+\n",
- " \tsysram\@30000000 {\n",
+ " \tsysram at 30000000 {\n",
" \t\tcompatible = \"nvidia,tegra186-sysram\", \"mmio-sram\";\n",
" \t\treg = <0x0 0x30000000 0x0 0x50000>;\n",
"-- \n",
"2.10.2"
]
-6c43345be07423b915e79597cb2598d0158a2ed9b49eeea1e097044c3c199ad8
+72d46953acaebbe417346e74b8c66a840a7a80e2ee9e66c7ba493fdec57aff7c
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.