All of lore.kernel.org
 help / color / mirror / Atom feed
From: Bjorn Helgaas <helgaas@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: LKML <linux-kernel@vger.kernel.org>,
	x86@kernel.org, Peter Anvin <hpa@zytor.com>,
	Borislav Petkov <bp@alien8.de>,
	Peter Zijlstra <peterz@infradead.org>,
	Stephane Eranian <eranian@google.com>,
	Andi Kleen <ak@linux.intel.com>,
	linux-pci@vger.kernel.org
Subject: Re: [patch 4/7] PCI: Provide Kconfig option for lockless config space accessors
Date: Tue, 27 Jun 2017 16:11:52 -0500	[thread overview]
Message-ID: <20170627211152.GE764@bhelgaas-glaptop.roam.corp.google.com> (raw)
In-Reply-To: <20170316215057.205961140@linutronix.de>

[+cc linux-pci]

On Thu, Mar 16, 2017 at 10:50:06PM +0100, Thomas Gleixner wrote:
> The generic pci configuration space accessors are globally serialized via
> pci_lock. On larger systems this causes massive lock contention when the
> configuration space has to be accessed frequently. One such access pattern
> is the Intel Uncore performance counter unit.

s/pci/PCI/ above.

> Provide a kernel config option which can be selected by an architecture
> when the low level PCI configuration space accessors in the architecture
> use their own serialization or can operate completely lockless.

The arch/x86/pci/common.c comment:

  /*
   * This interrupt-safe spinlock protects all accesses to PCI
   * configuration space.
   */
  DEFINE_RAW_SPINLOCK(pci_config_lock);

is no longer quite correct.

I think the raw_pci_read() and raw_pci_write() implementations are
such that we use the old locked accessors for the first 256 bytes,
even when ECAM is available.  Not necessarily a problem, just an
observation.  I guess the uncore PMU registers are in the extended
config space.

> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> ---
>  drivers/pci/Kconfig  |    3 +++
>  drivers/pci/access.c |   16 ++++++++++++----
>  2 files changed, 15 insertions(+), 4 deletions(-)
> 
> --- a/drivers/pci/Kconfig
> +++ b/drivers/pci/Kconfig
> @@ -86,6 +86,9 @@ config PCI_ATS
>  config PCI_ECAM
>  	bool
>  
> +config PCI_LOCKLESS_CONFIG
> +	bool

It's conceivable that this could be a per-host bridge property, but
not worth worrying about for now.

>  config PCI_IOV
>  	bool "PCI IOV support"
>  	depends on PCI
> --- a/drivers/pci/access.c
> +++ b/drivers/pci/access.c
> @@ -25,6 +25,14 @@ DEFINE_RAW_SPINLOCK(pci_lock);
>  #define PCI_word_BAD (pos & 1)
>  #define PCI_dword_BAD (pos & 3)
>  
> +#ifdef CONFIG_PCI_LOCKLESS_CONFIG
> +# define pci_lock_config(f)	do { (void)(f); } while (0)
> +# define pci_unlock_config(f)	do { (void)(f); } while (0)
> +#else
> +# define pci_lock_config(f)	raw_spin_lock_irqsave(&pci_lock, f)
> +# define pci_unlock_config(f)	raw_spin_unlock_irqrestore(&pci_lock, f)
> +#endif
> +
>  #define PCI_OP_READ(size, type, len) \
>  int pci_bus_read_config_##size \
>  	(struct pci_bus *bus, unsigned int devfn, int pos, type *value)	\
> @@ -33,10 +41,10 @@ int pci_bus_read_config_##size \
>  	unsigned long flags;						\
>  	u32 data = 0;							\
>  	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;	\
> -	raw_spin_lock_irqsave(&pci_lock, flags);			\
> +	pci_lock_config(flags);						\
>  	res = bus->ops->read(bus, devfn, pos, len, &data);		\
>  	*value = (type)data;						\
> -	raw_spin_unlock_irqrestore(&pci_lock, flags);		\
> +	pci_unlock_config(flags);					\
>  	return res;							\
>  }
>  
> @@ -47,9 +55,9 @@ int pci_bus_write_config_##size \
>  	int res;							\
>  	unsigned long flags;						\
>  	if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER;	\
> -	raw_spin_lock_irqsave(&pci_lock, flags);			\
> +	pci_lock_config(flags);						\
>  	res = bus->ops->write(bus, devfn, pos, len, value);		\
> -	raw_spin_unlock_irqrestore(&pci_lock, flags);		\
> +	pci_unlock_config(flags);					\
>  	return res;							\
>  }
>  
> 
> 

  reply	other threads:[~2017-06-27 21:12 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-16 21:50 [patch 0/7] x86/pci: Switch to lockless ECAM configuration mode Thomas Gleixner
2017-03-16 21:50 ` [patch 1/7] x86/pci: Remove duplicate defines Thomas Gleixner
2017-06-27 20:57   ` Bjorn Helgaas
2017-06-28 20:43   ` [tip:x86/platform] x86/PCI: " tip-bot for Thomas Gleixner
2017-03-16 21:50 ` [patch 2/7] x86/pci: Abort if legacy init fails Thomas Gleixner
2017-06-27 20:59   ` Bjorn Helgaas
2017-06-28 20:44   ` [tip:x86/platform] x86/PCI: " tip-bot for Thomas Gleixner
2017-03-16 21:50 ` [patch 3/7] x86/pci/ce4100: Properly lock accessor functions Thomas Gleixner
2017-03-17  0:28   ` Andi Kleen
2017-06-27 21:00   ` Bjorn Helgaas
2017-06-28 20:44   ` [tip:x86/platform] x86/PCI/ce4100: " tip-bot for Thomas Gleixner
2017-03-16 21:50 ` [patch 4/7] PCI: Provide Kconfig option for lockless config space accessors Thomas Gleixner
2017-06-27 21:11   ` Bjorn Helgaas [this message]
2017-06-28 20:31     ` Thomas Gleixner
2017-06-28 20:45   ` [tip:x86/platform] " tip-bot for Thomas Gleixner
2017-03-16 21:50 ` [patch 5/7] x86/pci: Select CONFIG_PCI_LOCKLESS_CONFIG Thomas Gleixner
2017-06-28 20:45   ` [tip:x86/platform] x86/PCI: " tip-bot for Thomas Gleixner
2017-03-16 21:50 ` [patch 6/7] x86/pci/mmcfg: Include 32/64 bit code into shared code Thomas Gleixner
2017-03-17  0:25   ` Andi Kleen
2017-03-17  8:41     ` Thomas Gleixner
2017-03-16 21:50 ` [patch 7/7] x86/pci/mmcfg: Switch to ECAM config mode if possible Thomas Gleixner
2017-03-17  0:26   ` Andi Kleen
2017-03-17  6:15     ` Thomas Gleixner
2017-06-27 21:31       ` Bjorn Helgaas
2017-06-28 20:46   ` [tip:x86/platform] x86/PCI/mmcfg: " tip-bot for Thomas Gleixner
2017-06-29  6:45   ` tip-bot for Thomas Gleixner
2017-06-29 23:26     ` Yinghai Lu
2017-06-30  3:18       ` Andi Kleen
2017-06-30 14:30         ` Thomas Gleixner
2017-06-30 17:16           ` Linus Torvalds
2017-06-30 18:30             ` Ivan Kokshaysky
2017-06-30 18:46             ` Thomas Gleixner
2017-06-13  0:25 ` [patch 0/7] x86/pci: Switch to lockless ECAM configuration mode Andi Kleen
2017-06-21 22:28   ` Thomas Gleixner
2017-06-27 20:55     ` Bjorn Helgaas

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170627211152.GE764@bhelgaas-glaptop.roam.corp.google.com \
    --to=helgaas@kernel.org \
    --cc=ak@linux.intel.com \
    --cc=bp@alien8.de \
    --cc=eranian@google.com \
    --cc=hpa@zytor.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=peterz@infradead.org \
    --cc=tglx@linutronix.de \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.