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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Kahola@freedesktop.org, Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH 2/5] drm/i915/cnl: Expose DVFS change functions
Date: Tue, 26 Sep 2017 12:17:15 -0700	[thread overview]
Message-ID: <20170926191718.1502-3-rodrigo.vivi@intel.com> (raw)
In-Reply-To: <20170926191718.1502-1-rodrigo.vivi@intel.com>

From: "Kahola, Mika" <mika.kahola@intel.com>

DVFS computation needs cnl_dvfs_{pre,post}_change() functions to be exposed.
These functions will be used when computing DVFS levels in intel_dpll_mgr.c

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Kahola, Mika <mika.kahola@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_cdclk.c | 4 ++--
 drivers/gpu/drm/i915/intel_drv.h   | 2 ++
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index a7f3e4615a44..86ef4d0add70 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -1510,7 +1510,7 @@ static void cnl_cdclk_pll_enable(struct drm_i915_private *dev_priv, int vco)
 	dev_priv->cdclk.hw.vco = vco;
 }
 
-static int cnl_dvfs_pre_change(struct drm_i915_private *dev_priv)
+int cnl_dvfs_pre_change(struct drm_i915_private *dev_priv)
 {
 	int ret;
 
@@ -1528,7 +1528,7 @@ static int cnl_dvfs_pre_change(struct drm_i915_private *dev_priv)
 	return ret;
 }
 
-static void cnl_dvfs_post_change(struct drm_i915_private *dev_priv, int level)
+void cnl_dvfs_post_change(struct drm_i915_private *dev_priv, int level)
 {
 	mutex_lock(&dev_priv->rps.hw_lock);
 	sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL, level);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 0cab667fff57..f9d7b48584d3 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1322,6 +1322,8 @@ void skl_init_cdclk(struct drm_i915_private *dev_priv);
 void skl_uninit_cdclk(struct drm_i915_private *dev_priv);
 void cnl_init_cdclk(struct drm_i915_private *dev_priv);
 void cnl_uninit_cdclk(struct drm_i915_private *dev_priv);
+int cnl_dvfs_pre_change(struct drm_i915_private *dev_priv);
+void cnl_dvfs_post_change(struct drm_i915_private *dev_priv, int level);
 void bxt_init_cdclk(struct drm_i915_private *dev_priv);
 void bxt_uninit_cdclk(struct drm_i915_private *dev_priv);
 void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv);
-- 
2.13.5

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  parent reply	other threads:[~2017-09-26 19:17 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-26 19:17 [PATCH 0/5] Introduce DVFS Rodrigo Vivi
2017-09-26 19:17 ` [PATCH 1/5] drm/i915/cnl: extract cnl_dvfs_{pre, post}_change Rodrigo Vivi
2017-09-26 19:17 ` Rodrigo Vivi [this message]
2017-09-26 19:17 ` [PATCH 3/5] drm/i915/cnl: DVFS for PLL enabling Rodrigo Vivi
2017-09-26 19:17 ` [PATCH 4/5] drm/i915/cnl: DVFS for PLL disabling Rodrigo Vivi
2017-09-26 19:17 ` [PATCH 5/5] drm/i915: Extend DVFS function back to Skylake Rodrigo Vivi
2017-09-26 19:40 ` ✓ Fi.CI.BAT: success for Introduce DVFS Patchwork
2017-09-27  4:38 ` ✓ Fi.CI.IGT: " Patchwork
2017-09-28 21:46 ` ✓ Fi.CI.BAT: " Patchwork
2017-09-29  0:06 ` ✗ Fi.CI.IGT: failure " Patchwork
2017-09-29 10:35 ` ✓ Fi.CI.BAT: success " Patchwork
2017-09-29 11:39 ` ✗ Fi.CI.BAT: failure " Patchwork

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