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From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v3 2/2] HAX: Enable GuC for CI
Date: Mon,  5 Mar 2018 14:29:17 +0000	[thread overview]
Message-ID: <20180305142917.10788-2-michal.wajdeczko@intel.com> (raw)
In-Reply-To: <20180305142917.10788-1-michal.wajdeczko@intel.com>

v2: except running with HYPERVISOR

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
 drivers/gpu/drm/i915/i915_params.h | 2 +-
 drivers/gpu/drm/i915/intel_uc.c    | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 430f5f9..3deae1e 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,7 @@
 	param(int, disable_power_well, -1) \
 	param(int, enable_ips, 1) \
 	param(int, invert_brightness, 0) \
-	param(int, enable_guc, 0) \
+	param(int, enable_guc, -1) \
 	param(int, guc_log_level, 0) \
 	param(char *, guc_firmware_path, NULL) \
 	param(char *, huc_firmware_path, NULL) \
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 8a64ff5..aaaeb61 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -63,6 +63,8 @@ static int __get_platform_enable_guc(struct drm_i915_private *dev_priv)
 		enable_guc |= ENABLE_GUC_LOAD_HUC;
 
 	/* Any platform specific fine-tuning can be done here */
+	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
+		enable_guc = 0;
 
 	return enable_guc;
 }
-- 
1.9.1

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  reply	other threads:[~2018-03-05 14:30 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-05 14:29 [PATCH v3 1/2] drm/i915/uc: Start preparing GuC/HuC for reset Michal Wajdeczko
2018-03-05 14:29 ` Michal Wajdeczko [this message]
2018-03-05 14:43 ` Chris Wilson
2018-03-08  5:47   ` Sagar Arun Kamble
2018-03-08 10:06     ` Michal Wajdeczko
2018-03-05 14:51 ` ✗ Fi.CI.BAT: failure for series starting with [v3,1/2] " Patchwork
2018-10-18 18:30 [PATCH v3 1/2] drm/i915/guc: Limit number of scratch registers used for H2G Michal Wajdeczko
2018-10-18 18:30 ` [PATCH v3 2/2] HAX: Enable GuC for CI Michal Wajdeczko

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