From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 20/20] drm/i915: Make all GPU resets atomic
Date: Wed, 31 Oct 2018 09:06:09 +0000 [thread overview]
Message-ID: <20181031090609.16324-20-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20181031090609.16324-1-chris@chris-wilson.co.uk>
In preparation for the next few commits, make resetting the GPU atomic.
Currently, we have prepared gen6+ for atomic resetting of individual
engines, but now there is a requirement to perform the whole device
level reset (just the register poking) from inside an atomic context.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_reset.c | 50 +++++++++++++++++--------------
1 file changed, 27 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c
index 78801c59ea31..f8196f13643d 100644
--- a/drivers/gpu/drm/i915/i915_reset.c
+++ b/drivers/gpu/drm/i915/i915_reset.c
@@ -144,14 +144,14 @@ static int i915_do_reset(struct drm_i915_private *i915,
/* Assert reset for at least 20 usec, and wait for acknowledgement. */
pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);
- usleep_range(50, 200);
- err = wait_for(i915_in_reset(pdev), 500);
+ udelay(50);
+ err = wait_for_atomic(i915_in_reset(pdev), 50);
/* Clear the reset request. */
pci_write_config_byte(pdev, I915_GDRST, 0);
- usleep_range(50, 200);
+ udelay(50);
if (!err)
- err = wait_for(!i915_in_reset(pdev), 500);
+ err = wait_for_atomic(!i915_in_reset(pdev), 50);
return err;
}
@@ -171,7 +171,7 @@ static int g33_do_reset(struct drm_i915_private *i915,
struct pci_dev *pdev = i915->drm.pdev;
pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);
- return wait_for(g4x_reset_complete(pdev), 500);
+ return wait_for_atomic(g4x_reset_complete(pdev), 50);
}
static int g4x_do_reset(struct drm_i915_private *dev_priv,
@@ -182,13 +182,13 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv,
int ret;
/* WaVcpClkGateDisableForMediaReset:ctg,elk */
- I915_WRITE(VDECCLK_GATE_D,
- I915_READ(VDECCLK_GATE_D) | VCP_UNIT_CLOCK_GATE_DISABLE);
- POSTING_READ(VDECCLK_GATE_D);
+ I915_WRITE_FW(VDECCLK_GATE_D,
+ I915_READ(VDECCLK_GATE_D) | VCP_UNIT_CLOCK_GATE_DISABLE);
+ POSTING_READ_FW(VDECCLK_GATE_D);
pci_write_config_byte(pdev, I915_GDRST,
GRDOM_MEDIA | GRDOM_RESET_ENABLE);
- ret = wait_for(g4x_reset_complete(pdev), 500);
+ ret = wait_for_atomic(g4x_reset_complete(pdev), 50);
if (ret) {
DRM_DEBUG_DRIVER("Wait for media reset failed\n");
goto out;
@@ -196,7 +196,7 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv,
pci_write_config_byte(pdev, I915_GDRST,
GRDOM_RENDER | GRDOM_RESET_ENABLE);
- ret = wait_for(g4x_reset_complete(pdev), 500);
+ ret = wait_for_atomic(g4x_reset_complete(pdev), 50);
if (ret) {
DRM_DEBUG_DRIVER("Wait for render reset failed\n");
goto out;
@@ -205,9 +205,9 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv,
out:
pci_write_config_byte(pdev, I915_GDRST, 0);
- I915_WRITE(VDECCLK_GATE_D,
- I915_READ(VDECCLK_GATE_D) & ~VCP_UNIT_CLOCK_GATE_DISABLE);
- POSTING_READ(VDECCLK_GATE_D);
+ I915_WRITE_FW(VDECCLK_GATE_D,
+ I915_READ(VDECCLK_GATE_D) & ~VCP_UNIT_CLOCK_GATE_DISABLE);
+ POSTING_READ_FW(VDECCLK_GATE_D);
return ret;
}
@@ -218,27 +218,29 @@ static int ironlake_do_reset(struct drm_i915_private *dev_priv,
{
int ret;
- I915_WRITE(ILK_GDSR, ILK_GRDOM_RENDER | ILK_GRDOM_RESET_ENABLE);
- ret = intel_wait_for_register(dev_priv,
- ILK_GDSR, ILK_GRDOM_RESET_ENABLE, 0,
- 500);
+ I915_WRITE_FW(ILK_GDSR, ILK_GRDOM_RENDER | ILK_GRDOM_RESET_ENABLE);
+ ret = __intel_wait_for_register_fw(dev_priv, ILK_GDSR,
+ ILK_GRDOM_RESET_ENABLE, 0,
+ 5000, 0,
+ NULL);
if (ret) {
DRM_DEBUG_DRIVER("Wait for render reset failed\n");
goto out;
}
- I915_WRITE(ILK_GDSR, ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE);
- ret = intel_wait_for_register(dev_priv,
- ILK_GDSR, ILK_GRDOM_RESET_ENABLE, 0,
- 500);
+ I915_WRITE_FW(ILK_GDSR, ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE);
+ ret = __intel_wait_for_register_fw(dev_priv, ILK_GDSR,
+ ILK_GRDOM_RESET_ENABLE, 0,
+ 5000, 0,
+ NULL);
if (ret) {
DRM_DEBUG_DRIVER("Wait for media reset failed\n");
goto out;
}
out:
- I915_WRITE(ILK_GDSR, 0);
- POSTING_READ(ILK_GDSR);
+ I915_WRITE_FW(ILK_GDSR, 0);
+ POSTING_READ_FW(ILK_GDSR);
return ret;
}
@@ -467,7 +469,9 @@ int intel_gpu_reset(struct drm_i915_private *i915, unsigned int engine_mask)
ret = -ENODEV;
if (reset) {
GEM_TRACE("engine_mask=%x\n", engine_mask);
+ preempt_disable();
ret = reset(i915, engine_mask, retry);
+ preempt_enable();
}
if (ret != -ETIMEDOUT || engine_mask != ALL_ENGINES)
break;
--
2.19.1
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next prev parent reply other threads:[~2018-10-31 9:06 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-31 9:05 [PATCH 01/20] RFT drm/i915/execlists: Flush memory before signaling ELSQ Chris Wilson
2018-10-31 9:05 ` [PATCH 02/20] drm/i915/userptr: Avoid struct_mutex recursion for mmu_invalidate_range_start Chris Wilson
2018-10-31 9:05 ` [PATCH 03/20] drm/i915: Prevent machine hang from Broxton's vtd w/a and error capture Chris Wilson
2018-10-31 9:05 ` [PATCH 04/20] drm/i915: Always try to reset the GPU on takeover Chris Wilson
2018-10-31 9:05 ` [PATCH 05/20] drm/i915: Cache the error string Chris Wilson
2018-10-31 9:05 ` [PATCH 06/20] drm/i915: Report the number of closed vma held by each context in debugfs Chris Wilson
2018-10-31 9:05 ` [PATCH 07/20] drm/i915: Remove debugfs/i915_ppgtt_info Chris Wilson
2018-10-31 9:05 ` [PATCH 08/20] drm/i915: Track all held rpm wakerefs Chris Wilson
2018-10-31 9:05 ` [PATCH 09/20] drm/i915: Markup paired operations on wakerefs Chris Wilson
2018-10-31 9:05 ` [PATCH 10/20] drm/i915: Syntatic sugar for using intel_runtime_pm Chris Wilson
2018-10-31 9:06 ` [PATCH 11/20] drm/i915: Markup paired operations on display power domains Chris Wilson
2018-10-31 9:06 ` [PATCH 12/20] drm/i915: Track the wakeref used to initialise " Chris Wilson
2018-10-31 9:06 ` [PATCH 13/20] drm/i915: Combined gt.awake/gt.power wakerefs Chris Wilson
2018-10-31 9:06 ` [PATCH 14/20] drm/i915/dp: Markup pps lock power well Chris Wilson
2018-10-31 9:06 ` [PATCH 15/20] drm/i915: Complain if hsw_get_pipe_config acquires the same power well twice Chris Wilson
2018-10-31 9:06 ` [PATCH 16/20] drm/i915: Mark up Ironlake ips with rpm wakerefs Chris Wilson
2018-10-31 9:06 ` [PATCH 17/20] drm/i915: Serialise concurrent calls to i915_gem_set_wedged() Chris Wilson
2018-10-31 9:06 ` [PATCH 18/20] drm/i915: Differentiate between ggtt->mutex and ppgtt->mutex Chris Wilson
2018-10-31 9:06 ` [PATCH 19/20] drm/i915: Pull all the reset functionality together into i915_reset.c Chris Wilson
2018-10-31 9:06 ` Chris Wilson [this message]
2018-10-31 12:10 ` ✗ Fi.CI.BAT: failure for series starting with [01/20] RFT drm/i915/execlists: Flush memory before signaling ELSQ Patchwork
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