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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Anusha <anusha.srivatsa@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
	Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [PATCH 1/2] drm/i915/cml: Add CML PCI IDS
Date: Wed, 6 Mar 2019 10:04:10 -0800	[thread overview]
Message-ID: <20190306180410.GB17782@intel.com> (raw)
In-Reply-To: <20190305214657.22399-1-anusha.srivatsa@intel.com>

On Tue, Mar 05, 2019 at 01:46:55PM -0800, Anusha wrote:
> From: Anusha Srivatsa <anusha.srivatsa@intel.com>
> 
> Comet Lake is a Intel Processor containing Gen9
> Intel HD Graphics. This patch adds the initial set of
> PCI IDs. Comet Lake comes off of Coffee Lake - adding
> the IDs to Coffee Lake ID list.
> 
> More support and features will be in the patches that follow.
> 
> v2: Split IDs according to GT. (Rodrigo)
> 
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c |  2 ++
>  include/drm/i915_pciids.h       | 31 ++++++++++++++++++++++++++++++-
>  2 files changed, 32 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index a9211c370cd1..63ca4ffcad8a 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -723,6 +723,8 @@ static const struct pci_device_id pciidlist[] = {
>  	INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
>  	INTEL_AML_CFL_GT2_IDS(&intel_coffeelake_gt2_info),
>  	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> +	INTEL_CML_GT1_IDS(&intel_coffeelake_gt1_info),
> +	INTEL_CML_GT2_IDS(&intel_coffeelake_gt2_info),

I prefer the order that you added here, but this is not the currently
order in use. worth to sort WHL/AML with per-platform instead of per-gt?

>  	INTEL_CNL_IDS(&intel_cannonlake_info),
>  	INTEL_ICL_11_IDS(&intel_icelake_11_info),
>  	{0, 0, 0}
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index d2fad7b0fcf6..e9ed75ac8252 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -373,6 +373,34 @@
>  #define INTEL_AML_CFL_GT2_IDS(info) \
>  	INTEL_VGA_DEVICE(0x87CA, info)
>  
> +/* CML GT1 */
> +#define INTEL_CML_GT1_IDS(info)	\
> +	INTEL_VGA_DEVICE(0x9BA1, info), \
> +	INTEL_VGA_DEVICE(0x9BAA, info), \
> +	INTEL_VGA_DEVICE(0x9BAB, info), \
> +	INTEL_VGA_DEVICE(0x9BAC, info), \
> +	INTEL_VGA_DEVICE(0x9BA0, info), \
> +	INTEL_VGA_DEVICE(0x9BA5, info), \
> +	INTEL_VGA_DEVICE(0x9BA8, info), \
> +	INTEL_VGA_DEVICE(0x9BA4, info), \
> +	INTEL_VGA_DEVICE(0x9BA2, info)
> +
> +/* CML GT2 */
> +#define INTEL_CML_GT2_IDS(info)	\
> +	INTEL_VGA_DEVICE(0x9BC1, info), \
> +	INTEL_VGA_DEVICE(0x9BCA, info), \
> +	INTEL_VGA_DEVICE(0x9BCB, info), \
> +	INTEL_VGA_DEVICE(0x9BCC, info), \
> +	INTEL_VGA_DEVICE(0x9BC0, info), \
> +	INTEL_VGA_DEVICE(0x9BC5, info), \
> +	INTEL_VGA_DEVICE(0x9BC8, info), \
> +	INTEL_VGA_DEVICE(0x9BC4, info), \
> +	INTEL_VGA_DEVICE(0x9BC2, info)

would you believe me if I tell you the table changed again? :P

> +
> +#define INTEL_CML_IDS(info) \
> +	INTEL_CML_GT1_IDS(info), \
> +	INTEL_CML_GT2_IDS(info)
> +
>  #define INTEL_KBL_IDS(info) \
>  	INTEL_KBL_GT1_IDS(info), \
>  	INTEL_KBL_GT2_IDS(info), \
> @@ -436,7 +464,8 @@
>  	INTEL_WHL_U_GT1_IDS(info), \
>  	INTEL_WHL_U_GT2_IDS(info), \
>  	INTEL_WHL_U_GT3_IDS(info), \
> -	INTEL_AML_CFL_GT2_IDS(info)
> +	INTEL_AML_CFL_GT2_IDS(info), \
> +	INTEL_CML_IDS(info)
>  
>  /* CNL */
>  #define INTEL_CNL_IDS(info) \
> -- 
> 2.21.0
> 
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  parent reply	other threads:[~2019-03-06 18:04 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-05 21:46 [PATCH 1/2] drm/i915/cml: Add CML PCI IDS Anusha
2019-03-05 21:46 ` [PATCH 2/2] drm/i915/cml: Introduce Comet Lake PCH Anusha
2019-03-06 18:07   ` Rodrigo Vivi
2019-03-07  2:20     ` Dhinakaran Pandiyan
2019-03-07 17:27       ` Rodrigo Vivi
2019-03-05 22:42 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/cml: Add CML PCI IDS Patchwork
2019-03-05 22:43 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-05 23:10 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-06  6:16 ` ✓ Fi.CI.IGT: " Patchwork
2019-03-06 18:04 ` Rodrigo Vivi [this message]
  -- strict thread matches above, loose matches on Subject: below --
2019-03-18 20:01 [PATCH 1/2] " Anusha
2019-03-14 18:29 Anusha
2019-03-14 19:56 ` Rodrigo Vivi
2019-03-04 23:06 Anusha
2019-03-04 23:50 ` Rodrigo Vivi

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