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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: linux-arm-kernel@lists.infradead.org
Cc: suzuki.poulose@arm.com, alexander.shishkin@linux.intel.com,
	coresight@lists.linaro.org, peterz@infradead.org,
	mike.leach@arm.com, leo.yan@linaro.org
Subject: [PATCH v2 04/16] coresight: Adding return code to sink::disable() operation
Date: Mon, 25 Mar 2019 15:56:20 -0600	[thread overview]
Message-ID: <20190325215632.17013-5-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <20190325215632.17013-1-mathieu.poirier@linaro.org>

In preparation to handle device reference counting inside of the sink
drivers, add a return code to the sink::disable() operation so that
proper action can be taken if a sink has not been disabled.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/hwtracing/coresight/coresight-etb10.c   | 3 ++-
 drivers/hwtracing/coresight/coresight-tmc-etf.c | 5 +++--
 drivers/hwtracing/coresight/coresight-tmc-etr.c | 5 +++--
 drivers/hwtracing/coresight/coresight-tpiu.c    | 3 ++-
 drivers/hwtracing/coresight/coresight.c         | 6 +++++-
 include/linux/coresight.h                       | 2 +-
 6 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c
index 105782ea64c7..71c2a3cdb866 100644
--- a/drivers/hwtracing/coresight/coresight-etb10.c
+++ b/drivers/hwtracing/coresight/coresight-etb10.c
@@ -325,7 +325,7 @@ static void etb_disable_hw(struct etb_drvdata *drvdata)
 	coresight_disclaim_device(drvdata->base);
 }
 
-static void etb_disable(struct coresight_device *csdev)
+static int etb_disable(struct coresight_device *csdev)
 {
 	struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 	unsigned long flags;
@@ -340,6 +340,7 @@ static void etb_disable(struct coresight_device *csdev)
 	spin_unlock_irqrestore(&drvdata->spinlock, flags);
 
 	dev_dbg(drvdata->dev, "ETB disabled\n");
+	return 0;
 }
 
 static void *etb_alloc_buffer(struct coresight_device *csdev, int cpu,
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c
index a5f053f2db2c..d4213e7c2c45 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
@@ -273,7 +273,7 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev,
 	return 0;
 }
 
-static void tmc_disable_etf_sink(struct coresight_device *csdev)
+static int tmc_disable_etf_sink(struct coresight_device *csdev)
 {
 	unsigned long flags;
 	struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
@@ -281,7 +281,7 @@ static void tmc_disable_etf_sink(struct coresight_device *csdev)
 	spin_lock_irqsave(&drvdata->spinlock, flags);
 	if (drvdata->reading) {
 		spin_unlock_irqrestore(&drvdata->spinlock, flags);
-		return;
+		return -EBUSY;
 	}
 
 	/* Disable the TMC only if it needs to */
@@ -293,6 +293,7 @@ static void tmc_disable_etf_sink(struct coresight_device *csdev)
 	spin_unlock_irqrestore(&drvdata->spinlock, flags);
 
 	dev_dbg(drvdata->dev, "TMC-ETB/ETF disabled\n");
+	return 0;
 }
 
 static int tmc_enable_etf_link(struct coresight_device *csdev,
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index f684283890d3..33501777038a 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -1392,7 +1392,7 @@ static int tmc_enable_etr_sink(struct coresight_device *csdev,
 	return -EINVAL;
 }
 
-static void tmc_disable_etr_sink(struct coresight_device *csdev)
+static int tmc_disable_etr_sink(struct coresight_device *csdev)
 {
 	unsigned long flags;
 	struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
@@ -1400,7 +1400,7 @@ static void tmc_disable_etr_sink(struct coresight_device *csdev)
 	spin_lock_irqsave(&drvdata->spinlock, flags);
 	if (drvdata->reading) {
 		spin_unlock_irqrestore(&drvdata->spinlock, flags);
-		return;
+		return -EBUSY;
 	}
 
 	/* Disable the TMC only if it needs to */
@@ -1412,6 +1412,7 @@ static void tmc_disable_etr_sink(struct coresight_device *csdev)
 	spin_unlock_irqrestore(&drvdata->spinlock, flags);
 
 	dev_dbg(drvdata->dev, "TMC-ETR disabled\n");
+	return 0;
 }
 
 static const struct coresight_ops_sink tmc_etr_sink_ops = {
diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c
index b2f72a1fa402..0d13da1b9df1 100644
--- a/drivers/hwtracing/coresight/coresight-tpiu.c
+++ b/drivers/hwtracing/coresight/coresight-tpiu.c
@@ -94,13 +94,14 @@ static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
 	CS_LOCK(drvdata->base);
 }
 
-static void tpiu_disable(struct coresight_device *csdev)
+static int tpiu_disable(struct coresight_device *csdev)
 {
 	struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 
 	tpiu_disable_hw(drvdata);
 
 	dev_dbg(drvdata->dev, "TPIU disabled\n");
+	return 0;
 }
 
 static const struct coresight_ops_sink tpiu_sink_ops = {
diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c
index 29cef898afba..13eda4693f81 100644
--- a/drivers/hwtracing/coresight/coresight.c
+++ b/drivers/hwtracing/coresight/coresight.c
@@ -239,9 +239,13 @@ static int coresight_enable_sink(struct coresight_device *csdev,
 
 static void coresight_disable_sink(struct coresight_device *csdev)
 {
+	int ret;
+
 	if (atomic_dec_return(csdev->refcnt) == 0) {
 		if (sink_ops(csdev)->disable) {
-			sink_ops(csdev)->disable(csdev);
+			ret = sink_ops(csdev)->disable(csdev);
+			if (ret)
+				return;
 			csdev->enable = false;
 		}
 	}
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 7b87965f7a65..189cc6ddc92b 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -192,7 +192,7 @@ struct coresight_device {
  */
 struct coresight_ops_sink {
 	int (*enable)(struct coresight_device *csdev, u32 mode, void *data);
-	void (*disable)(struct coresight_device *csdev);
+	int (*disable)(struct coresight_device *csdev);
 	void *(*alloc_buffer)(struct coresight_device *csdev, int cpu,
 			      void **pages, int nr_pages, bool overwrite);
 	void (*free_buffer)(void *config);
-- 
2.17.1


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  parent reply	other threads:[~2019-03-25 22:06 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-25 21:56 [PATCH v2 00/16] coresight: Add support for CPU-wide trace scenarios Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 01/16] coresight: pmu: Adding ITRACE property to cs_etm PMU Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 02/16] coresight: etm4x: Add kernel configuration for CONTEXTID Mathieu Poirier
2019-03-26 11:59   ` Suzuki K Poulose
2019-03-25 21:56 ` [PATCH v2 03/16] coresight: etm4x: Configure tracers to emit timestamps Mathieu Poirier
2019-03-26 11:53   ` Suzuki K Poulose
2019-03-25 21:56 ` Mathieu Poirier [this message]
2019-03-26 14:55   ` [PATCH v2 04/16] coresight: Adding return code to sink::disable() operation Suzuki K Poulose
2019-03-25 21:56 ` [PATCH v2 05/16] coresight: Move reference counting inside sink drivers Mathieu Poirier
2019-03-26 15:04   ` Suzuki K Poulose
2019-03-25 21:56 ` [PATCH v2 06/16] coresight: Properly address errors in sink::disable() functions Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 07/16] coresight: Properly address concurrency in sink::update() functions Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 08/16] coresight: perf: Clean up function etm_setup_aux() Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 09/16] coresight: perf: Refactor function free_event_data() Mathieu Poirier
2019-03-26 15:07   ` Suzuki K Poulose
2019-03-25 21:56 ` [PATCH v2 10/16] coresight: Communicate perf event to sink buffer allocation function Mathieu Poirier
2019-03-26 15:12   ` Suzuki K Poulose
2019-03-25 21:56 ` [PATCH v2 11/16] coresight: tmc-etr: Refactor function tmc_etr_setup_perf_buf() Mathieu Poirier
2019-03-26 15:29   ` Suzuki K Poulose
2019-03-26 16:29     ` Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 12/16] coresight: tmc-etr: Introduce the notion of process ID to ETR devices Mathieu Poirier
2019-03-26 16:46   ` Suzuki K Poulose
2019-03-26 18:06     ` Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 13/16] coresight: tmc-etr: Allow events to use the same ETR buffer Mathieu Poirier
2019-03-26 16:18   ` Suzuki K Poulose
2019-03-26 17:55     ` Mathieu Poirier
2019-03-27 11:32       ` Suzuki K Poulose
2019-03-27 17:01         ` Mathieu Poirier
2019-04-01 13:01           ` Suzuki K Poulose
2019-04-03  2:13             ` Mathieu Poirier
2019-03-30 15:43   ` Leo Yan
2019-04-01  7:29     ` Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 14/16] coresight: tmc-etr: Add support for CPU-wide trace scenarios Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 15/16] coresight: tmc-etf: " Mathieu Poirier
2019-03-25 21:56 ` [PATCH v2 16/16] coresight: etb10: " Mathieu Poirier
2019-03-27  7:52 ` [PATCH v2 00/16] coresight: " Leo Yan
2019-03-27 14:40   ` Mathieu Poirier
2019-03-27 14:44     ` Leo Yan
2019-04-11 18:52 ` Robert Walker
2019-04-16 19:37   ` Mathieu Poirier
2019-04-24 16:22     ` Robert Walker

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