From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC449CA9EAF for ; Sun, 27 Oct 2019 21:16:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 908CC205C9 for ; Sun, 27 Oct 2019 21:16:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572210965; bh=CzjJGI9pfHkZbK+2YWhIK0w8TLcspavH7qQCc7Fm0CQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=KMmP/QOTBXGAyYVxc3/PmsirdDEjEry6w1QMRwHgXerI1hUW65i6p9yg9hxJJTHz9 r+97d80zL+nC9LO+ynWC5rlsdtwefikr7kitt7dXgRLZYoMHTepsaYzZ5iCMlPcP5n bjvmXM1UOAXbMIx53WrIClPwHMpFAlBALxiu9/KQ= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730756AbfJ0VQE (ORCPT ); Sun, 27 Oct 2019 17:16:04 -0400 Received: from mail.kernel.org ([198.145.29.99]:35502 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730746AbfJ0VQB (ORCPT ); Sun, 27 Oct 2019 17:16:01 -0400 Received: from localhost (100.50.158.77.rev.sfr.net [77.158.50.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8C4C020717; Sun, 27 Oct 2019 21:16:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572210961; bh=CzjJGI9pfHkZbK+2YWhIK0w8TLcspavH7qQCc7Fm0CQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AGKPdW4oNh91UTWwVkwX7GEiezRaWsZZ+LJA6gyGwd5kjvUPvTYJYTp/RLeS44R61 VQG/p+xPMZknFrKvvR5NATaIcQvMzOXVoeX/0H2aHvVHt9opzYCPJ2x69iMz6vGFU9 ZYT9NUCJBP9PsIP3rLXPTbOqzO0KikT8PApLr5WE= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Biao Huang , "David S. Miller" Subject: [PATCH 4.19 33/93] net: stmmac: disable/enable ptp_ref_clk in suspend/resume flow Date: Sun, 27 Oct 2019 22:00:45 +0100 Message-Id: <20191027203257.708941532@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191027203251.029297948@linuxfoundation.org> References: <20191027203251.029297948@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Biao Huang [ Upstream commit e497c20e203680aba9ccf7bb475959595908ca7e ] disable ptp_ref_clk in suspend flow, and enable it in resume flow. Fixes: f573c0b9c4e0 ("stmmac: move stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to platform structure") Signed-off-by: Biao Huang Signed-off-by: David S. Miller Signed-off-by: Greg Kroah-Hartman --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -4522,8 +4522,10 @@ int stmmac_suspend(struct device *dev) stmmac_mac_set(priv, priv->ioaddr, false); pinctrl_pm_select_sleep_state(priv->device); /* Disable clock in case of PWM is off */ - clk_disable(priv->plat->pclk); - clk_disable(priv->plat->stmmac_clk); + if (priv->plat->clk_ptp_ref) + clk_disable_unprepare(priv->plat->clk_ptp_ref); + clk_disable_unprepare(priv->plat->pclk); + clk_disable_unprepare(priv->plat->stmmac_clk); } mutex_unlock(&priv->lock); @@ -4588,8 +4590,10 @@ int stmmac_resume(struct device *dev) } else { pinctrl_pm_select_default_state(priv->device); /* enable the clk previously disabled */ - clk_enable(priv->plat->stmmac_clk); - clk_enable(priv->plat->pclk); + clk_prepare_enable(priv->plat->stmmac_clk); + clk_prepare_enable(priv->plat->pclk); + if (priv->plat->clk_ptp_ref) + clk_prepare_enable(priv->plat->clk_ptp_ref); /* reset the phy so that it's ready */ if (priv->mii) stmmac_mdio_reset(priv->mii);