From: kbuild test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: Replace I915_READ with intel_uncore_read
Date: Sat, 07 Dec 2019 21:23:04 +0800 [thread overview]
Message-ID: <201912072111.S6jq4wCD%lkp@intel.com> (raw)
In-Reply-To: <20191205162428.1503-1-andi.shyti@intel.com>
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Hi Andi,
I love your patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v5.4 next-20191202]
[cannot apply to drm-tip/drm-tip]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Andi-Shyti/drm-i915-gt-Replace-I915_READ-with-intel_uncore_read/20191207-144813
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-defconfig (attached as .config)
compiler: gcc-7 (Debian 7.5.0-1) 7.5.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/gt/intel_engine_cs.c: In function 'intel_engine_context_size':
>> drivers/gpu/drm/i915/gt/intel_engine_cs.c:182:4: error: 'ctx_size' undeclared (first use in this function); did you mean 'cxt_size'?
ctx_size = intel_uncore_read(uncore, GEN7_CXT_SIZE);
^~~~~~~~
cxt_size
drivers/gpu/drm/i915/gt/intel_engine_cs.c:182:4: note: each undeclared identifier is reported only once for each function it appears in
vim +182 drivers/gpu/drm/i915/gt/intel_engine_cs.c
141
142 /**
143 * intel_engine_context_size() - return the size of the context for an engine
144 * @dev_priv: i915 device private
145 * @class: engine class
146 *
147 * Each engine class may require a different amount of space for a context
148 * image.
149 *
150 * Return: size (in bytes) of an engine class specific context image
151 *
152 * Note: this size includes the HWSP, which is part of the context image
153 * in LRC mode, but does not include the "shared data page" used with
154 * GuC submission. The caller should account for this if using the GuC.
155 */
156 u32 intel_engine_context_size(struct drm_i915_private *dev_priv, u8 class)
157 {
158 struct intel_uncore *uncore = &dev_priv->uncore;
159 u32 cxt_size;
160
161 BUILD_BUG_ON(I915_GTT_PAGE_SIZE != PAGE_SIZE);
162
163 switch (class) {
164 case RENDER_CLASS:
165 switch (INTEL_GEN(dev_priv)) {
166 default:
167 MISSING_CASE(INTEL_GEN(dev_priv));
168 return DEFAULT_LR_CONTEXT_RENDER_SIZE;
169 case 12:
170 case 11:
171 return GEN11_LR_CONTEXT_RENDER_SIZE;
172 case 10:
173 return GEN10_LR_CONTEXT_RENDER_SIZE;
174 case 9:
175 return GEN9_LR_CONTEXT_RENDER_SIZE;
176 case 8:
177 return GEN8_LR_CONTEXT_RENDER_SIZE;
178 case 7:
179 if (IS_HASWELL(dev_priv))
180 return HSW_CXT_TOTAL_SIZE;
181
> 182 ctx_size = intel_uncore_read(uncore, GEN7_CXT_SIZE);
183 return round_up(GEN7_CXT_TOTAL_SIZE(cxt_size) * 64,
184 PAGE_SIZE);
185 case 6:
186 ctx_size = intel_uncore_read(uncore, CXT_SIZE);
187 return round_up(GEN6_CXT_TOTAL_SIZE(cxt_size) * 64,
188 PAGE_SIZE);
189 case 5:
190 case 4:
191 /*
192 * There is a discrepancy here between the size reported
193 * by the register and the size of the context layout
194 * in the docs. Both are described as authorative!
195 *
196 * The discrepancy is on the order of a few cachelines,
197 * but the total is under one page (4k), which is our
198 * minimum allocation anyway so it should all come
199 * out in the wash.
200 */
201 ctx_size = intel_uncore_read(uncore, CXT_SIZE) + 1;
202 DRM_DEBUG_DRIVER("gen%d CXT_SIZE = %d bytes [0x%08x]\n",
203 INTEL_GEN(dev_priv),
204 cxt_size * 64,
205 cxt_size - 1);
206 return round_up(cxt_size * 64, PAGE_SIZE);
207 case 3:
208 case 2:
209 /* For the special day when i810 gets merged. */
210 case 1:
211 return 0;
212 }
213 break;
214 default:
215 MISSING_CASE(class);
216 /* fall through */
217 case VIDEO_DECODE_CLASS:
218 case VIDEO_ENHANCEMENT_CLASS:
219 case COPY_ENGINE_CLASS:
220 if (INTEL_GEN(dev_priv) < 8)
221 return 0;
222 return GEN8_LR_CONTEXT_OTHER_SIZE;
223 }
224 }
225
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation
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next prev parent reply other threads:[~2019-12-07 13:23 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-05 16:24 [Intel-gfx] [PATCH] drm/i915/gt: Replace I915_READ with intel_uncore_read Andi Shyti
2019-12-05 16:44 ` Chris Wilson
2019-12-05 18:33 ` Chris Wilson
2019-12-05 18:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Replace I915_READ with intel_uncore_read (rev2) Patchwork
2019-12-06 0:05 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2019-12-07 13:23 ` kbuild test robot [this message]
2019-12-07 22:53 ` [Intel-gfx] [PATCH] drm/i915/gt: Replace I915_READ with intel_uncore_read kbuild test robot
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