From: David Wu <david.wu@rock-chips.com>
To: u-boot@lists.denx.de
Subject: [PATCH 2/8] net: dwc_eth_qos: Fix the software reset
Date: Thu, 30 Apr 2020 18:36:49 +0800 [thread overview]
Message-ID: <20200430103656.29728-3-david.wu@rock-chips.com> (raw)
In-Reply-To: <20200430103656.29728-1-david.wu@rock-chips.com>
When using rgmii Gigabit mode, the wait_for_bit_le32()
reset method resulting in RX can not receive data, after
this patch, works well.
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
drivers/net/dwc_eth_qos.c | 21 +++++++++++++++------
1 file changed, 15 insertions(+), 6 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index a72132cacf..16988f6bdc 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1034,7 +1034,7 @@ static int eqos_write_hwaddr(struct udevice *dev)
static int eqos_start(struct udevice *dev)
{
struct eqos_priv *eqos = dev_get_priv(dev);
- int ret, i;
+ int ret, i, limit;
ulong rate;
u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
ulong last_rx_desc;
@@ -1060,12 +1060,21 @@ static int eqos_start(struct udevice *dev)
eqos->reg_access_ok = true;
- ret = wait_for_bit_le32(&eqos->dma_regs->mode,
- EQOS_DMA_MODE_SWR, false,
- eqos->config->swr_wait, false);
- if (ret) {
+ /* DMA SW reset */
+ val = readl(&eqos->dma_regs->mode);
+ val |= EQOS_DMA_MODE_SWR;
+ writel(val, &eqos->dma_regs->mode);
+ limit = eqos->config->swr_wait / 10;
+ while (limit--) {
+ if (!(readl(&eqos->dma_regs->mode) & EQOS_DMA_MODE_SWR))
+ break;
+ mdelay(10000);
+ }
+
+ if (limit < 0) {
pr_err("EQOS_DMA_MODE_SWR stuck");
- goto err_stop_resets;
+ goto err_stop_clks;
+ return -ETIMEDOUT;
}
ret = eqos->config->ops->eqos_calibrate_pads(dev);
--
2.19.1
next prev parent reply other threads:[~2020-04-30 10:36 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-30 10:36 [PATCH 0/8] Add dwc_eth_qos support for rockchip David Wu
2020-04-30 10:36 ` [PATCH 1/8] net: dwc_eth_qos: Use dev_ functions calls to get FDT data David Wu
2020-04-30 10:36 ` David Wu [this message]
2020-04-30 15:28 ` [PATCH 2/8] net: dwc_eth_qos: Fix the software reset Patrice CHOTARD
2020-04-30 22:25 ` Stephen Warren
2020-04-30 10:36 ` [PATCH 3/8] net: dwc_eth_qos: Add option "snps, reset-gpio" phy-rst gpio for stm32 David Wu
2020-04-30 15:47 ` [PATCH 3/8] net: dwc_eth_qos: Add option "snps,reset-gpio" " Patrice CHOTARD
2020-05-09 2:59 ` David Wu
2020-04-30 22:36 ` [PATCH 3/8] net: dwc_eth_qos: Add option "snps, reset-gpio" " Stephen Warren
2020-04-30 22:42 ` Stephen Warren
2020-05-09 2:41 ` David Wu
2020-05-09 3:32 ` David Wu
2020-04-30 10:36 ` [PATCH 4/8] net: dwc_eth_qos: Move interface() to eqos_ops struct David Wu
2020-04-30 22:39 ` Stephen Warren
2020-05-09 3:22 ` David Wu
2020-04-30 10:43 ` [PATCH 5/8] net: dwc_eth_qos: Make clk_rx and clk_tx optional David Wu
2020-04-30 14:00 ` Patrice CHOTARD
2020-05-09 6:31 ` David Wu
2020-04-30 22:45 ` Stephen Warren
2020-05-09 6:33 ` David Wu
2020-04-30 10:44 ` [PATCH 6/8] net: dwc_eth_qos: Split eqos_start() to get link speed David Wu
2020-04-30 15:33 ` Patrice CHOTARD
2020-05-09 6:42 ` David Wu
2020-05-11 12:48 ` Patrice CHOTARD
2020-05-12 1:56 ` David Wu
2020-04-30 10:45 ` [PATCH 7/8] net: dwc_eth_qos: Export common struct and interface at head file David Wu
2020-04-30 12:06 ` Patrice CHOTARD
2020-04-30 22:47 ` Stephen Warren
2020-04-30 10:45 ` [PATCH 8/8] net: gmac_rockchip: Add dwc_eth_qos support David Wu
2020-04-30 22:52 ` Stephen Warren
2020-05-09 6:56 ` David Wu
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