[PULL 00/31] target-arm queue

[Peter Maydell <peter.maydell@linaro.org>]

First arm pullreq of the 5.1 cycle; mostly bugfixes and some
cleanup patches. The new clock modelling framework is the big
thing here.

-- PMM

The following changes since commit 648db19685b7030aa558a4ddbd3a8e53d8c9a062:

  Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2020-04-29' into staging (2020-04-29 15:07:33 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200430

for you to fetch changes up to 1267437e593e85498f9105b3bdab796630d2e83f:

  hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes (2020-04-30 11:52:29 +0100)

----------------------------------------------------------------
target-arm queue:
 * xlnx-zdma: Fix endianness handling of descriptor loading
 * nrf51: Fix last GPIO CNF address
 * gicv3: Use gicr_typer in arm_gicv3_icc_reset
 * msf2: Add EMAC block to SmartFusion2 SoC
 * New clock modelling framework
 * hw/arm: versal: Setup the ADMA with 128bit bus-width
 * Cadence: gem: fix wraparound in 64bit descriptors
 * cadence_gem: clear RX control descriptor
 * target/arm: Vectorize integer comparison vs zero
 * hw/arm/virt: dt: add kaslr-seed property
 * hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes

----------------------------------------------------------------
Cameron Esfahani (1):
      nrf51: Fix last GPIO CNF address

Damien Hedde (7):
      hw/core/clock-vmstate: define a vmstate entry for clock state
      qdev: add clock input&output support to devices.
      qdev-clock: introduce an init array to ease the device construction
      hw/misc/zynq_slcr: add clock generation for uarts
      hw/char/cadence_uart: add clock support
      hw/arm/xilinx_zynq: connect uart clocks to slcr
      qdev-monitor: print the device's clock with info qtree

Edgar E. Iglesias (7):
      dma/xlnx-zdma: Fix descriptor loading (MEM) wrt endianness
      dma/xlnx-zdma: Fix descriptor loading (REG) wrt endianness
      hw/arm: versal: Setup the ADMA with 128bit bus-width
      device_tree: Allow name wildcards in qemu_fdt_node_path()
      device_tree: Constify compat in qemu_fdt_node_path()
      hw/arm: xlnx-zcu102: Move arm_boot_info into XlnxZCU102
      hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes

Jerome Forissier (2):
      hw/arm/virt: dt: move creation of /secure-chosen to create_fdt()
      hw/arm/virt: dt: add kaslr-seed property

Keqian Zhu (2):
      bugfix: Use gicr_typer in arm_gicv3_icc_reset
      Typo: Correct the name of CPU hotplug memory region

Peter Maydell (2):
      hw/core/clock: introduce clock object
      docs/clocks: add device's clock documentation

Philippe Mathieu-Daudé (3):
      target/arm: Restrict the Address Translate write operation to TCG accel
      target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[]
      target/arm/cpu: Update coding style to make checkpatch.pl happy

Ramon Fried (2):
      Cadence: gem: fix wraparound in 64bit descriptors
      net: cadence_gem: clear RX control descriptor

Richard Henderson (1):
      target/arm: Vectorize integer comparison vs zero

Subbaraya Sundeep (3):
      hw/net: Add Smartfusion2 emac block
      msf2: Add EMAC block to SmartFusion2 SoC
      tests/boot_linux_console: Add ethernet test to SmartFusion2

Thomas Huth (1):
      target/arm: Make cpu_register() available for other files

 hw/core/Makefile.objs                  |   2 +
 hw/net/Makefile.objs                   |   1 +
 tests/Makefile.include                 |   1 +
 include/hw/arm/msf2-soc.h              |   2 +
 include/hw/char/cadence_uart.h         |   1 +
 include/hw/clock.h                     | 225 +++++++++++++
 include/hw/gpio/nrf51_gpio.h           |   2 +-
 include/hw/net/msf2-emac.h             |  53 +++
 include/hw/qdev-clock.h                | 159 +++++++++
 include/hw/qdev-core.h                 |  12 +
 include/sysemu/device_tree.h           |   5 +-
 target/arm/cpu-qom.h                   |   9 +-
 target/arm/helper.h                    |  27 +-
 target/arm/translate.h                 |   5 +
 device_tree.c                          |   4 +-
 hw/acpi/cpu.c                          |   2 +-
 hw/arm/msf2-soc.c                      |  26 +-
 hw/arm/virt.c                          |  20 +-
 hw/arm/xilinx_zynq.c                   |  57 +++-
 hw/arm/xlnx-versal.c                   |   2 +
 hw/arm/xlnx-zcu102.c                   |  39 ++-
 hw/char/cadence_uart.c                 |  73 +++-
 hw/core/clock-vmstate.c                |  25 ++
 hw/core/clock.c                        | 130 ++++++++
 hw/core/qdev-clock.c                   | 185 +++++++++++
 hw/core/qdev.c                         |  12 +
 hw/dma/xlnx-zdma.c                     |  25 +-
 hw/intc/arm_gicv3_kvm.c                |   4 +-
 hw/misc/zynq_slcr.c                    | 172 +++++++++-
 hw/net/cadence_gem.c                   |  16 +-
 hw/net/msf2-emac.c                     | 589 +++++++++++++++++++++++++++++++++
 qdev-monitor.c                         |   9 +
 target/arm/cpu.c                       |  25 +-
 target/arm/cpu64.c                     |  16 +-
 target/arm/helper.c                    |  17 +
 target/arm/neon_helper.c               |  24 --
 target/arm/translate-a64.c             |  64 +---
 target/arm/translate.c                 | 256 ++++++++++++--
 target/arm/vec_helper.c                |  25 ++
 MAINTAINERS                            |   2 +
 docs/devel/clocks.rst                  | 391 ++++++++++++++++++++++
 docs/devel/index.rst                   |   1 +
 hw/char/trace-events                   |   3 +
 hw/core/trace-events                   |   7 +
 tests/acceptance/boot_linux_console.py |  15 +-
 45 files changed, 2538 insertions(+), 202 deletions(-)
 create mode 100644 include/hw/clock.h
 create mode 100644 include/hw/net/msf2-emac.h
 create mode 100644 include/hw/qdev-clock.h
 create mode 100644 hw/core/clock-vmstate.c
 create mode 100644 hw/core/clock.c
 create mode 100644 hw/core/qdev-clock.c
 create mode 100644 hw/net/msf2-emac.c
 create mode 100644 docs/devel/clocks.rst