Re: [PATCH v2 10/19] spi: dw: Use DMA max burst to set the request thresholds

[Andy Shevchenko <andriy.shevchenko@linux.intel.com>]

On Sat, May 16, 2020 at 11:01:33PM +0300, Serge Semin wrote:
> On Fri, May 15, 2020 at 05:38:42PM +0300, Andy Shevchenko wrote:
> > On Fri, May 15, 2020 at 01:47:49PM +0300, Serge Semin wrote:
> > > Each channel of DMA controller may have a limited length of burst
> > > transaction (number of IO operations performed at ones in a single
> > > DMA client request). This parameter can be used to setup the most
> > > optimal DMA Tx/Rx data level values. In order to avoid the Tx buffer
> > > overrun we can set the DMA Tx level to be of FIFO depth minus the
> > > maximum burst transactions length. To prevent the Rx buffer underflow
> > > the DMA Rx level should be set to the maximum burst transactions length.
> > > This commit setups the DMA channels and the DW SPI DMA Tx/Rx levels
> > > in accordance with these rules.

...

> > >  	/* DMA info */
> > >  	struct dma_chan		*txchan;
> > > +	u32			txburst;
> > >  	struct dma_chan		*rxchan;
> > > +	u32			rxburst;
> > 
> > Leave u32 together, it may be optimal on 64-bit architectures where ABIs require padding.
> 
> It's not like anyone cared about padding in this structure in the first place)

I think I have been caring (to some extend).

> Though if v3 is required I'll group these members together.

From what I see v3 is what Mark and me are waiting for. Mark, are we on the
same page here?

-- 
With Best Regards,
Andy Shevchenko