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From: Dejin Zheng <zhengdejin5@gmail.com>
To: p.zabel@pengutronix.de, broonie@kernel.org
Cc: linux-kernel@vger.kernel.org, Dejin Zheng <zhengdejin5@gmail.com>,
	kernel test robot <lkp@intel.com>
Subject: [PATCH v1] reset: intel: fix a compile warning about REG_OFFSET redefined
Date: Thu,  4 Jun 2020 23:30:39 +0800	[thread overview]
Message-ID: <20200604153039.22957-1-zhengdejin5@gmail.com> (raw)

kernel test robot reports a compile warning about REG_OFFSET redefined
in the reset-intel-gw.c after merging commit e44ab4e14d6f4 ("regmap:
Simplify implementation of the regmap_read_poll_timeout() macro"). the
warning is like that:

drivers/reset/reset-intel-gw.c:18:0: warning: "REG_OFFSET" redefined
 #define REG_OFFSET GENMASK(31, 16)

In file included from ./arch/arm/mach-ixp4xx/include/mach/hardware.h:30:0,
                 from ./arch/arm/mach-ixp4xx/include/mach/io.h:15,
                 from ./arch/arm/include/asm/io.h:198,
                 from ./include/linux/io.h:13,
                 from ./include/linux/iopoll.h:14,
                 from ./include/linux/regmap.h:20,
                 from drivers/reset/reset-intel-gw.c:12:
./arch/arm/mach-ixp4xx/include/mach/platform.h:25:0: note: this is the location of the previous definition
 #define REG_OFFSET 3

Reported-by: kernel test robot <lkp@intel.com>
Fixes: e44ab4e14d6f4 ("regmap: Simplify implementation of the regmap_read_poll_timeout() macro")
Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com>
---
 drivers/reset/reset-intel-gw.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/reset/reset-intel-gw.c b/drivers/reset/reset-intel-gw.c
index 854238444616..5cfb4892b399 100644
--- a/drivers/reset/reset-intel-gw.c
+++ b/drivers/reset/reset-intel-gw.c
@@ -15,7 +15,7 @@
 #define RCU_RST_STAT	0x0024
 #define RCU_RST_REQ	0x0048
 
-#define REG_OFFSET	GENMASK(31, 16)
+#define REG_OFFSET_MASK	GENMASK(31, 16)
 #define BIT_OFFSET	GENMASK(15, 8)
 #define STAT_BIT_OFFSET	GENMASK(7, 0)
 
@@ -51,7 +51,7 @@ static u32 id_to_reg_and_bit_offsets(struct intel_reset_data *data,
 				     unsigned long id, u32 *rst_req,
 				     u32 *req_bit, u32 *stat_bit)
 {
-	*rst_req = FIELD_GET(REG_OFFSET, id);
+	*rst_req = FIELD_GET(REG_OFFSET_MASK, id);
 	*req_bit = FIELD_GET(BIT_OFFSET, id);
 
 	if (data->soc_data->legacy)
@@ -141,7 +141,7 @@ static int intel_reset_xlate(struct reset_controller_dev *rcdev,
 	if (spec->args[1] > 31)
 		return -EINVAL;
 
-	id = FIELD_PREP(REG_OFFSET, spec->args[0]);
+	id = FIELD_PREP(REG_OFFSET_MASK, spec->args[0]);
 	id |= FIELD_PREP(BIT_OFFSET, spec->args[1]);
 
 	if (data->soc_data->legacy) {
@@ -210,7 +210,7 @@ static int intel_reset_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
-	data->reboot_id = FIELD_PREP(REG_OFFSET, rb_id[0]);
+	data->reboot_id = FIELD_PREP(REG_OFFSET_MASK, rb_id[0]);
 	data->reboot_id |= FIELD_PREP(BIT_OFFSET, rb_id[1]);
 
 	if (data->soc_data->legacy)
-- 
2.25.0


             reply	other threads:[~2020-06-04 15:31 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-04 15:30 Dejin Zheng [this message]
2020-06-26 10:38 ` [PATCH v1] reset: intel: fix a compile warning about REG_OFFSET redefined Philipp Zabel
2020-06-26 12:33   ` Dejin Zheng

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