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From: Simon Glass <sjg@chromium.org>
To: u-boot@lists.denx.de
Subject: [PATCH v6 08/25] x86: mp_init: Adjust bsp_init() to return more information
Date: Fri, 17 Jul 2020 08:48:14 -0600	[thread overview]
Message-ID: <20200717144831.309167-9-sjg@chromium.org> (raw)
In-Reply-To: <20200717144831.309167-1-sjg@chromium.org>

This function is misnamed since it does not actually init the BSP. Also
it is convenient to adjust it to return a little more information.

Rename and update the function, to allow it to return the BSP CPU device
and number, as well as the total number of CPUs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---

(no changes since v4)

Changes in v4:
- Update get_bsp() to return zero when SMP is not inited

Changes in v2:
- Drop change to include/dm/uclass.h
- Mention error return in get_bsp()

 arch/x86/cpu/mp_init.c | 36 +++++++++++++++++++++++-------------
 1 file changed, 23 insertions(+), 13 deletions(-)

diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 6f6de49df0..9fdde7832a 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -421,9 +421,18 @@ static int bsp_do_flight_plan(struct udevice *cpu, struct mp_flight_plan *plan,
 	return ret;
 }
 
-static int init_bsp(struct udevice **devp)
+/**
+ * get_bsp() - Get information about the bootstrap processor
+ *
+ * @devp: If non-NULL, returns CPU device corresponding to the BSP
+ * @cpu_countp: If non-NULL, returns the total number of CPUs
+ * @return CPU number of the BSP, or -ve on error. If multiprocessing is not
+ *	enabled, returns 0
+ */
+static int get_bsp(struct udevice **devp, int *cpu_countp)
 {
 	char processor_name[CPU_MAX_NAME_LEN];
+	struct udevice *dev;
 	int apic_id;
 	int ret;
 
@@ -431,13 +440,20 @@ static int init_bsp(struct udevice **devp)
 	debug("CPU: %s\n", processor_name);
 
 	apic_id = lapicid();
-	ret = find_cpu_by_apic_id(apic_id, devp);
-	if (ret) {
+	ret = find_cpu_by_apic_id(apic_id, &dev);
+	if (ret < 0) {
 		printf("Cannot find boot CPU, APIC ID %d\n", apic_id);
 		return ret;
 	}
+	ret = cpu_get_count(dev);
+	if (ret < 0)
+		return log_msg_ret("count", ret);
+	if (devp)
+		*devp = dev;
+	if (cpu_countp)
+		*cpu_countp = ret;
 
-	return 0;
+	return dev->req_seq >= 0 ? dev->req_seq : 0;
 }
 
 static int mp_init_cpu(struct udevice *cpu, void *unused)
@@ -476,24 +492,18 @@ int mp_init(void)
 	uclass_id_foreach_dev(UCLASS_CPU, cpu, uc)
 		cpu->req_seq = dev_read_u32_default(cpu, "reg", -1);
 
-	ret = init_bsp(&cpu);
-	if (ret) {
+	ret = get_bsp(&cpu, &num_cpus);
+	if (ret < 0) {
 		debug("Cannot init boot CPU: err=%d\n", ret);
 		return ret;
 	}
 
-	num_cpus = cpu_get_count(cpu);
-	if (num_cpus < 0) {
-		debug("Cannot get number of CPUs: err=%d\n", num_cpus);
-		return num_cpus;
-	}
-
 	if (num_cpus < 2)
 		debug("Warning: Only 1 CPU is detected\n");
 
 	ret = check_cpu_devices(num_cpus);
 	if (ret)
-		debug("Warning: Device tree does not describe all CPUs. Extra ones will not be started correctly\n");
+		log_warning("Warning: Device tree does not describe all CPUs. Extra ones will not be started correctly\n");
 
 	/* Copy needed parameters so that APs have a reference to the plan */
 	mp_info.num_records = ARRAY_SIZE(mp_steps);
-- 
2.28.0.rc0.105.gf9edc3c819-goog

  parent reply	other threads:[~2020-07-17 14:48 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-17 14:48 [PATCH v6 00/25] x86: Enhance MTRR functionality to support multiple CPUs Simon Glass
2020-07-17 14:48 ` [PATCH v6 01/25] x86: mp_init: Switch to livetree Simon Glass
2020-07-17 14:48 ` [PATCH v6 02/25] x86: Move MP code into mp_init Simon Glass
2020-07-17 14:48 ` [PATCH v6 03/25] x86: mp_init: Avoid declarations in header files Simon Glass
2020-07-17 14:48 ` [PATCH v6 04/25] x86: mp_init: Switch parameter names in start_aps() Simon Glass
2020-07-17 14:48 ` [PATCH v6 05/25] x86: mp_init: Drop the num_cpus static variable Simon Glass
2020-07-17 14:48 ` [PATCH v6 06/25] x86: mtrr: Fix 'ensable' typo Simon Glass
2020-07-17 14:48 ` [PATCH v6 07/25] x86: mp_init: Set up the CPU numbers at the start Simon Glass
2020-07-17 14:48 ` Simon Glass [this message]
2020-07-17 14:48 ` [PATCH v6 09/25] x86: cpu: Remove unnecessary #ifdefs Simon Glass
2020-07-17 14:48 ` [PATCH v6 10/25] x86: mp: Support APs waiting for instructions Simon Glass
2020-07-20  1:22   ` Bin Meng
2020-07-17 14:48 ` [PATCH v6 11/25] global_data: Add a generic global_data flag for SMP state Simon Glass
2020-07-20  1:23   ` Bin Meng
2020-07-17 14:48 ` [PATCH v6 12/25] x86: Set the SMP flag when MP init is complete Simon Glass
2020-07-17 14:48 ` [PATCH v6 13/25] x86: mp: Allow running functions on multiple CPUs Simon Glass
2020-07-20  1:25   ` Bin Meng
2020-07-17 14:48 ` [PATCH v6 14/25] x86: mp: Park CPUs before running the OS Simon Glass
2020-07-20  1:26   ` Bin Meng
2020-07-17 14:48 ` [PATCH v6 15/25] x86: mp: Add iterators for CPUs Simon Glass
2020-07-20  1:26   ` Bin Meng
2020-07-17 14:48 ` [PATCH v6 16/25] x86: mtrr: Use MP calls to list the MTRRs Simon Glass
2020-07-17 14:48 ` [PATCH v6 17/25] x86: Don't enable SMP in SPL Simon Glass
2020-07-17 14:48 ` [PATCH v6 18/25] x86: coral: Update the memory map Simon Glass
2020-07-17 14:48 ` [PATCH v6 19/25] x86: mtrr: Update MTRRs on all CPUs Simon Glass
2020-07-20  1:27   ` Bin Meng
2020-07-17 14:48 ` [PATCH v6 20/25] x86: mtrr: Add support for writing to MTRRs on any CPU Simon Glass
2020-07-17 14:48 ` [PATCH v6 21/25] x86: mtrr: Update the command to use the new mtrr calls Simon Glass
2020-07-17 14:48 ` [PATCH v6 22/25] x86: mtrr: Restructure so command execution is in one place Simon Glass
2020-07-17 14:48 ` [PATCH v6 23/25] x86: mtrr: Update 'mtrr' to allow setting MTRRs on any CPU Simon Glass
2020-07-17 14:48 ` [PATCH v6 24/25] x86: mp: Add more comments to the module Simon Glass
2020-07-17 14:48 ` [PATCH v6 25/25] x86: mtrr: Enhance 'mtrr' command to list MTRRs on any CPU Simon Glass
2020-07-20  1:28   ` Bin Meng
2020-07-20  1:46 ` [PATCH v6 00/25] x86: Enhance MTRR functionality to support multiple CPUs Bin Meng

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