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From: Bjorn Helgaas <helgaas@kernel.org>
To: Ricky Wu <ricky_wu@realtek.com>
Cc: Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	Rui Feng <rui_feng@realsil.com.cn>, Klaus Doth <kdlnx@doth.eu>,
	Linus Walleij <linus.walleij@linaro.org>,
	Rui Miguel Silva <rmfrfs@gmail.com>,
	Puranjay Mohan <puranjay12@gmail.com>,
	linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org,
	Bjorn Helgaas <bhelgaas@google.com>
Subject: [PATCH 4/5] misc: rtsx: Find L1 PM Substates capability instead of hard-coding
Date: Tue, 21 Jul 2020 16:23:35 -0500	[thread overview]
Message-ID: <20200721212336.1159079-5-helgaas@kernel.org> (raw)
In-Reply-To: <20200721212336.1159079-1-helgaas@kernel.org>

From: Bjorn Helgaas <bhelgaas@google.com>

Instead of hard-coding the location of the L1 PM Substates capability based
on the Device ID, search for it in the extended capabilities list.  This
works for any device, as long as it implements the L1 PM Substates
capability correctly, so it doesn't require maintenance as new devices are
added.  No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 drivers/misc/cardreader/rts5249.c | 12 ++++++------
 drivers/misc/cardreader/rts5260.c |  7 ++++++-
 drivers/misc/cardreader/rts5261.c |  7 ++++++-
 include/linux/rtsx_pci.h          |  4 ----
 4 files changed, 18 insertions(+), 12 deletions(-)

diff --git a/drivers/misc/cardreader/rts5249.c b/drivers/misc/cardreader/rts5249.c
index 665472d05993..1b8149e806c1 100644
--- a/drivers/misc/cardreader/rts5249.c
+++ b/drivers/misc/cardreader/rts5249.c
@@ -95,15 +95,15 @@ static void rtsx_base_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)
 static void rts5249_init_from_cfg(struct rtsx_pcr *pcr)
 {
 	struct pci_dev *pdev = pcr->pci;
+	int l1ss;
 	struct rtsx_cr_option *option = &(pcr->option);
 	u32 lval;
 
-	if (CHK_PCI_PID(pcr, PID_524A))
-		pci_read_config_dword(pdev,
-			PCR_ASPM_SETTING_REG1, &lval);
-	else
-		pci_read_config_dword(pdev,
-			PCR_ASPM_SETTING_REG2, &lval);
+	l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
+	if (!l1ss)
+		return;
+
+	pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
 
 	if (lval & ASPM_L1_1_EN_MASK)
 		rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
diff --git a/drivers/misc/cardreader/rts5260.c b/drivers/misc/cardreader/rts5260.c
index 0e806dd7ad08..ebf77643cc90 100644
--- a/drivers/misc/cardreader/rts5260.c
+++ b/drivers/misc/cardreader/rts5260.c
@@ -498,10 +498,15 @@ static void rts5260_pwr_saving_setting(struct rtsx_pcr *pcr)
 static void rts5260_init_from_cfg(struct rtsx_pcr *pcr)
 {
 	struct pci_dev *pdev = pcr->pci;
+	int l1ss;
 	struct rtsx_cr_option *option = &pcr->option;
 	u32 lval;
 
-	pci_read_config_dword(pdev, PCR_ASPM_SETTING_5260, &lval);
+	l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
+	if (!l1ss)
+		return;
+
+	pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
 
 	if (lval & ASPM_L1_1_EN_MASK)
 		rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
diff --git a/drivers/misc/cardreader/rts5261.c b/drivers/misc/cardreader/rts5261.c
index 4f30637ee4ac..4b6e3fe4a007 100644
--- a/drivers/misc/cardreader/rts5261.c
+++ b/drivers/misc/cardreader/rts5261.c
@@ -413,10 +413,15 @@ static int rts5261_init_from_hw(struct rtsx_pcr *pcr)
 static void rts5261_init_from_cfg(struct rtsx_pcr *pcr)
 {
 	struct pci_dev *pdev = pcr->pci;
+	int l1ss;
 	u32 lval;
 	struct rtsx_cr_option *option = &pcr->option;
 
-	pci_read_config_dword(pdev, PCR_ASPM_SETTING_REG1, &lval);
+	l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
+	if (!l1ss)
+		return;
+
+	pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
 
 	if (lval & ASPM_L1_1_EN_MASK)
 		rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
diff --git a/include/linux/rtsx_pci.h b/include/linux/rtsx_pci.h
index 87eafba55749..f1e27b858972 100644
--- a/include/linux/rtsx_pci.h
+++ b/include/linux/rtsx_pci.h
@@ -1029,10 +1029,6 @@
 #define   PHY_DIG1E_RX_EN_KEEP		0x0001
 #define PHY_DUM_REG			0x1F
 
-#define PCR_ASPM_SETTING_REG1		0x160
-#define PCR_ASPM_SETTING_REG2		0x168
-#define PCR_ASPM_SETTING_5260		0x178
-
 #define PCR_SETTING_REG1		0x724
 #define PCR_SETTING_REG2		0x814
 #define PCR_SETTING_REG3		0x747
-- 
2.25.1


  parent reply	other threads:[~2020-07-21 21:24 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-21 21:23 [PATCH 0/5] minor rtsx cleanups Bjorn Helgaas
2020-07-21 21:23 ` [PATCH 1/5] misc: rtsx: Use pcie_capability_clear_and_set_word() for PCI_EXP_LNKCTL Bjorn Helgaas
2020-07-21 21:23 ` [PATCH 2/5] misc: rtsx: Remove unused pcie_cap Bjorn Helgaas
2020-07-21 21:23 ` [PATCH 3/5] misc: rtsx: Remove rtsx_pci_read/write_config() wrappers Bjorn Helgaas
2020-07-21 21:23 ` Bjorn Helgaas [this message]
2020-07-21 21:23 ` [PATCH 5/5] misc: rtsx: Use standard PCI definitions Bjorn Helgaas
2020-07-21 21:28 ` [PATCH 0/5] minor rtsx cleanups Arnd Bergmann
2020-07-23  8:16   ` 吳昊澄 Ricky
2020-07-23  8:28     ` Greg Kroah-Hartman

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