Re: [RFC PATCH 06/14] coresight: Convert claim and lock operations to use access wrappers

[kernel test robot <lkp@intel.com>]

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Hi Suzuki,

[FYI, it's a private test report for your RFC patch.]
[auto build test ERROR on next-20200722]
[cannot apply to stm32/stm32-next keystone/next rockchip/for-next shawnguo/for-next soc/for-next linus/master v5.8-rc6 v5.8-rc5 v5.8-rc4 v5.8-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Suzuki-K-Poulose/coresight-Support-for-ETMv4-4-system-instructions/20200723-012330
base:    73aece61f643fc0a1d224b6ad53e70832ac757c3
config: arm-allyesconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   In file included from drivers/hwtracing/coresight/coresight-etm3x.c:24:
   include/linux/coresight.h: In function 'csdev_access_relaxed_read64':
   include/linux/coresight.h:369:10: error: implicit declaration of function 'readq_relaxed'; did you mean 'readw_relaxed'? [-Werror=implicit-function-declaration]
     369 |   return readq_relaxed(csa->base + offset);
         |          ^~~~~~~~~~~~~
         |          readw_relaxed
   include/linux/coresight.h: In function 'csdev_access_read64':
   include/linux/coresight.h:383:10: error: implicit declaration of function 'readq'; did you mean 'readb'? [-Werror=implicit-function-declaration]
     383 |   return readq(csa->base + offset);
         |          ^~~~~
         |          readb
   include/linux/coresight.h: In function 'csdev_access_relaxed_write64':
   include/linux/coresight.h:402:10: error: implicit declaration of function 'writeq_relaxed'; did you mean 'writeb_relaxed'? [-Werror=implicit-function-declaration]
     402 |   return writeq_relaxed(val, csa->base + offset);
         |          ^~~~~~~~~~~~~~
         |          writeb_relaxed
   include/linux/coresight.h:402:10: warning: 'return' with a value, in function returning void [-Wreturn-type]
     402 |   return writeq_relaxed(val, csa->base + offset);
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/coresight.h:397:20: note: declared here
     397 | static inline void csdev_access_relaxed_write64(struct csdev_access *csa,
         |                    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/coresight.h: In function 'csdev_access_write64':
   include/linux/coresight.h:418:10: error: implicit declaration of function 'writeq'; did you mean 'writeb'? [-Werror=implicit-function-declaration]
     418 |   return writeq(val, csa->base + offset);
         |          ^~~~~~
         |          writeb
   include/linux/coresight.h:418:10: warning: 'return' with a value, in function returning void [-Wreturn-type]
     418 |   return writeq(val, csa->base + offset);
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   include/linux/coresight.h:415:20: note: declared here
     415 | static inline void csdev_access_write64(struct csdev_access *csa, u64 val, u32 offset)
         |                    ^~~~~~~~~~~~~~~~~~~~
   drivers/hwtracing/coresight/coresight-etm3x.c: In function 'etm_disable_perf':
>> drivers/hwtracing/coresight/coresight-etm3x.c:595:27: error: 'csdev' redeclared as different kind of symbol
     595 |  struct coresight_device *csdev;
         |                           ^~~~~
   drivers/hwtracing/coresight/coresight-etm3x.c:592:55: note: previous definition of 'csdev' was here
     592 | static void etm_disable_perf(struct coresight_device *csdev)
         |                              ~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~
   drivers/hwtracing/coresight/coresight-etm3x.c: In function 'etm_init_arch_data':
>> drivers/hwtracing/coresight/coresight-etm3x.c:756:12: error: passing argument 1 of 'CS_UNLOCK' from incompatible pointer type [-Werror=incompatible-pointer-types]
     756 |  CS_UNLOCK(&csa);
         |            ^~~~
         |            |
         |            struct csdev_access **
   In file included from drivers/hwtracing/coresight/coresight-etm.h:11,
                    from drivers/hwtracing/coresight/coresight-etm3x.c:33:
   drivers/hwtracing/coresight/coresight-priv.h:120:51: note: expected 'struct csdev_access *' but argument is of type 'struct csdev_access **'
     120 | static inline void CS_UNLOCK(struct csdev_access *csa)
         |                              ~~~~~~~~~~~~~~~~~~~~~^~~
   cc1: some warnings being treated as errors

vim +/csdev +595 drivers/hwtracing/coresight/coresight-etm3x.c

   591	
   592	static void etm_disable_perf(struct coresight_device *csdev)
   593	{
   594		struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 > 595		struct coresight_device *csdev;
   596	
   597		if (WARN_ON_ONCE(drvdata->cpu != smp_processor_id()))
   598			return;
   599	
   600		CS_UNLOCK(&csdev->access);
   601	
   602		/* Setting the prog bit disables tracing immediately */
   603		etm_set_prog(drvdata);
   604	
   605		/*
   606		 * There is no way to know when the tracer will be used again so
   607		 * power down the tracer.
   608		 */
   609		etm_set_pwrdwn(drvdata);
   610		coresight_disclaim_device_unlocked(csdev);
   611	
   612		CS_LOCK(&csdev->access);
   613	}
   614	
   615	static void etm_disable_sysfs(struct coresight_device *csdev)
   616	{
   617		struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
   618	
   619		/*
   620		 * Taking hotplug lock here protects from clocks getting disabled
   621		 * with tracing being left on (crash scenario) if user disable occurs
   622		 * after cpu online mask indicates the cpu is offline but before the
   623		 * DYING hotplug callback is serviced by the ETM driver.
   624		 */
   625		cpus_read_lock();
   626		spin_lock(&drvdata->spinlock);
   627	
   628		/*
   629		 * Executing etm_disable_hw on the cpu whose ETM is being disabled
   630		 * ensures that register writes occur when cpu is powered.
   631		 */
   632		smp_call_function_single(drvdata->cpu, etm_disable_hw, drvdata, 1);
   633	
   634		spin_unlock(&drvdata->spinlock);
   635		cpus_read_unlock();
   636	
   637		dev_dbg(&csdev->dev, "ETM tracing disabled\n");
   638	}
   639	
   640	static void etm_disable(struct coresight_device *csdev,
   641				struct perf_event *event)
   642	{
   643		u32 mode;
   644		struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
   645	
   646		/*
   647		 * For as long as the tracer isn't disabled another entity can't
   648		 * change its status.  As such we can read the status here without
   649		 * fearing it will change under us.
   650		 */
   651		mode = local_read(&drvdata->mode);
   652	
   653		switch (mode) {
   654		case CS_MODE_DISABLED:
   655			break;
   656		case CS_MODE_SYSFS:
   657			etm_disable_sysfs(csdev);
   658			break;
   659		case CS_MODE_PERF:
   660			etm_disable_perf(csdev);
   661			break;
   662		default:
   663			WARN_ON_ONCE(mode);
   664			return;
   665		}
   666	
   667		if (mode)
   668			local_set(&drvdata->mode, CS_MODE_DISABLED);
   669	}
   670	
   671	static const struct coresight_ops_source etm_source_ops = {
   672		.cpu_id		= etm_cpu_id,
   673		.trace_id	= etm_trace_id,
   674		.enable		= etm_enable,
   675		.disable	= etm_disable,
   676	};
   677	
   678	static const struct coresight_ops etm_cs_ops = {
   679		.source_ops	= &etm_source_ops,
   680	};
   681	
   682	static int etm_online_cpu(unsigned int cpu)
   683	{
   684		if (!etmdrvdata[cpu])
   685			return 0;
   686	
   687		if (etmdrvdata[cpu]->boot_enable && !etmdrvdata[cpu]->sticky_enable)
   688			coresight_enable(etmdrvdata[cpu]->csdev);
   689		return 0;
   690	}
   691	
   692	static int etm_starting_cpu(unsigned int cpu)
   693	{
   694		if (!etmdrvdata[cpu])
   695			return 0;
   696	
   697		spin_lock(&etmdrvdata[cpu]->spinlock);
   698		if (!etmdrvdata[cpu]->os_unlock) {
   699			etm_os_unlock(etmdrvdata[cpu]);
   700			etmdrvdata[cpu]->os_unlock = true;
   701		}
   702	
   703		if (local_read(&etmdrvdata[cpu]->mode))
   704			etm_enable_hw(etmdrvdata[cpu]);
   705		spin_unlock(&etmdrvdata[cpu]->spinlock);
   706		return 0;
   707	}
   708	
   709	static int etm_dying_cpu(unsigned int cpu)
   710	{
   711		if (!etmdrvdata[cpu])
   712			return 0;
   713	
   714		spin_lock(&etmdrvdata[cpu]->spinlock);
   715		if (local_read(&etmdrvdata[cpu]->mode))
   716			etm_disable_hw(etmdrvdata[cpu]);
   717		spin_unlock(&etmdrvdata[cpu]->spinlock);
   718		return 0;
   719	}
   720	
   721	static bool etm_arch_supported(u8 arch)
   722	{
   723		switch (arch) {
   724		case ETM_ARCH_V3_3:
   725			break;
   726		case ETM_ARCH_V3_5:
   727			break;
   728		case PFT_ARCH_V1_0:
   729			break;
   730		case PFT_ARCH_V1_1:
   731			break;
   732		default:
   733			return false;
   734		}
   735		return true;
   736	}
   737	
   738	/*
   739	 * This function is called even before the csdev is registered.
   740	 * Thus we cant rely on drvdata->csdev to be valid.
   741	 */
   742	static void etm_init_arch_data(void *info)
   743	{
   744		u32 etmidr;
   745		u32 etmccr;
   746		int cpu;
   747		struct etm_drvdata *drvdata;
   748		struct csdev_access *csa = info;
   749	
   750		cpu = smp_processor_id();
   751		drvdata = etmdrvdata[cpu];
   752	
   753		/* Make sure all registers are accessible */
   754		etm_os_unlock(drvdata);
   755	
 > 756		CS_UNLOCK(&csa);
   757	
   758		/* First dummy read */
   759		(void)etm_readl(drvdata, ETMPDSR);
   760		/* Provide power to ETM: ETMPDCR[3] == 1 */
   761		etm_set_pwrup(drvdata);
   762		/*
   763		 * Clear power down bit since when this bit is set writes to
   764		 * certain registers might be ignored.
   765		 */
   766		etm_clr_pwrdwn(drvdata);
   767		/*
   768		 * Set prog bit. It will be set from reset but this is included to
   769		 * ensure it is set
   770		 */
   771		etm_set_prog(drvdata);
   772	
   773		/* Find all capabilities */
   774		etmidr = etm_readl(drvdata, ETMIDR);
   775		drvdata->arch = BMVAL(etmidr, 4, 11);
   776		drvdata->port_size = etm_readl(drvdata, ETMCR) & PORT_SIZE_MASK;
   777	
   778		drvdata->etmccer = etm_readl(drvdata, ETMCCER);
   779		etmccr = etm_readl(drvdata, ETMCCR);
   780		drvdata->etmccr = etmccr;
   781		drvdata->nr_addr_cmp = BMVAL(etmccr, 0, 3) * 2;
   782		drvdata->nr_cntr = BMVAL(etmccr, 13, 15);
   783		drvdata->nr_ext_inp = BMVAL(etmccr, 17, 19);
   784		drvdata->nr_ext_out = BMVAL(etmccr, 20, 22);
   785		drvdata->nr_ctxid_cmp = BMVAL(etmccr, 24, 25);
   786	
   787		etm_set_pwrdwn(drvdata);
   788		etm_clr_pwrup(drvdata);
   789		CS_LOCK(csa);
   790	}
   791	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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