From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0BB5C433DF for ; Fri, 21 Aug 2020 03:46:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A91C420758 for ; Fri, 21 Aug 2020 03:46:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="JpTZ2xd3" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728021AbgHUDqa (ORCPT ); Thu, 20 Aug 2020 23:46:30 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:33229 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727116AbgHUDq1 (ORCPT ); Thu, 20 Aug 2020 23:46:27 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1597981585; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=e/gnTPvWUTbMq564VoLj5uTu8OHvCHvzXduEcgygO8U=; b=JpTZ2xd3N1IEBnjoosMtn+YYw2/VsYjSoEp9pzzPFgnlx+CVTFPB0Xw+Gorx4n+DCDI9NR79 lDiYj3a0Gy9YtBv9QUgoIUlE1zy/TRov6cTSzCMtEoZSoUM7cNRteOX2ddvo8PfqbOwOeP17 x6pep59q9ka4FNMLuqutXAT5nw4= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n07.prod.us-west-2.postgun.com with SMTP id 5f3f435a0dab4fdee2122df6 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Fri, 21 Aug 2020 03:45:30 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 96FA7C433AF; Fri, 21 Aug 2020 03:45:30 +0000 (UTC) Received: from tingweiz-gv.qualcomm.com (unknown [180.166.53.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: tingwei) by smtp.codeaurora.org (Postfix) with ESMTPSA id A9AA5C433A0; Fri, 21 Aug 2020 03:45:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org A9AA5C433A0 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=tingwei@codeaurora.org From: Tingwei Zhang To: Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin , Mike Leach Cc: Mian Yousaf Kaukab , Greg Kroah-Hartman , Leo Yan , Randy Dunlap , Russell King , Kim Phillips , tsoni@codeaurora.org, Sai Prakash Ranjan , Mao Jinlong , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tingwei Zhang Subject: [PATCH v10 05/24] coresight: export global symbols Date: Fri, 21 Aug 2020 11:44:26 +0800 Message-Id: <20200821034445.967-6-tingwei@codeaurora.org> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20200821034445.967-1-tingwei@codeaurora.org> References: <20200821034445.967-1-tingwei@codeaurora.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mian Yousaf Kaukab Export symbols used among coresight modules. Signed-off-by: Mian Yousaf Kaukab Signed-off-by: Tingwei Zhang Tested-by: Mike Leach Reviewed-by: Suzuki K Poulose Reviewed-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm-perf.c | 1 + drivers/hwtracing/coresight/coresight-sysfs.c | 2 ++ drivers/hwtracing/coresight/coresight-tmc-etr.c | 6 ++++++ drivers/hwtracing/coresight/coresight.c | 8 ++++++++ 4 files changed, 17 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 1a3169e69bb1..dcb0592418ae 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -517,6 +517,7 @@ int etm_perf_symlink(struct coresight_device *csdev, bool link) return 0; } +EXPORT_SYMBOL_GPL(etm_perf_symlink); static ssize_t etm_perf_sink_name_show(struct device *dev, struct device_attribute *dattr, diff --git a/drivers/hwtracing/coresight/coresight-sysfs.c b/drivers/hwtracing/coresight/coresight-sysfs.c index 82afeaf2ccc4..34d2a2d31d00 100644 --- a/drivers/hwtracing/coresight/coresight-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-sysfs.c @@ -102,6 +102,7 @@ int coresight_add_sysfs_link(struct coresight_sysfs_link *info) return ret; } +EXPORT_SYMBOL_GPL(coresight_add_sysfs_link); void coresight_remove_sysfs_link(struct coresight_sysfs_link *info) { @@ -122,6 +123,7 @@ void coresight_remove_sysfs_link(struct coresight_sysfs_link *info) info->orig->nr_links--; info->target->nr_links--; } +EXPORT_SYMBOL_GPL(coresight_remove_sysfs_link); /* * coresight_make_links: Make a link for a connection from a @orig diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index b29c2db94d96..ad991a37e2d2 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -255,6 +255,7 @@ void tmc_free_sg_table(struct tmc_sg_table *sg_table) tmc_free_table_pages(sg_table); tmc_free_data_pages(sg_table); } +EXPORT_SYMBOL_GPL(tmc_free_sg_table); /* * Alloc pages for the table. Since this will be used by the device, @@ -340,6 +341,7 @@ struct tmc_sg_table *tmc_alloc_sg_table(struct device *dev, return sg_table; } +EXPORT_SYMBOL_GPL(tmc_alloc_sg_table); /* * tmc_sg_table_sync_data_range: Sync the data buffer written @@ -360,6 +362,7 @@ void tmc_sg_table_sync_data_range(struct tmc_sg_table *table, PAGE_SIZE, DMA_FROM_DEVICE); } } +EXPORT_SYMBOL_GPL(tmc_sg_table_sync_data_range); /* tmc_sg_sync_table: Sync the page table */ void tmc_sg_table_sync_table(struct tmc_sg_table *sg_table) @@ -372,6 +375,7 @@ void tmc_sg_table_sync_table(struct tmc_sg_table *sg_table) dma_sync_single_for_device(real_dev, table_pages->daddrs[i], PAGE_SIZE, DMA_TO_DEVICE); } +EXPORT_SYMBOL_GPL(tmc_sg_table_sync_table); /* * tmc_sg_table_get_data: Get the buffer pointer for data @offset @@ -401,6 +405,7 @@ ssize_t tmc_sg_table_get_data(struct tmc_sg_table *sg_table, *bufpp = page_address(data_pages->pages[pg_idx]) + pg_offset; return len; } +EXPORT_SYMBOL_GPL(tmc_sg_table_get_data); #ifdef ETR_SG_DEBUG /* Map a dma address to virtual address */ @@ -766,6 +771,7 @@ tmc_etr_get_catu_device(struct tmc_drvdata *drvdata) return NULL; } +EXPORT_SYMBOL_GPL(tmc_etr_get_catu_device); static inline int tmc_etr_enable_catu(struct tmc_drvdata *drvdata, struct etr_buf *etr_buf) diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index d515088cc47d..cd17aea6b50d 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -54,6 +54,7 @@ static struct list_head *stm_path; * it needs to look for another sync sequence. */ const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; +EXPORT_SYMBOL_GPL(coresight_barrier_pkt); static int coresight_id_match(struct device *dev, void *data) { @@ -179,6 +180,7 @@ int coresight_claim_device_unlocked(void __iomem *base) coresight_clear_claim_tags(base); return -EBUSY; } +EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked); int coresight_claim_device(void __iomem *base) { @@ -190,6 +192,7 @@ int coresight_claim_device(void __iomem *base) return rc; } +EXPORT_SYMBOL_GPL(coresight_claim_device); /* * coresight_disclaim_device_unlocked : Clear the claim tags for the device. @@ -208,6 +211,7 @@ void coresight_disclaim_device_unlocked(void __iomem *base) */ WARN_ON_ONCE(1); } +EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked); void coresight_disclaim_device(void __iomem *base) { @@ -215,6 +219,7 @@ void coresight_disclaim_device(void __iomem *base) coresight_disclaim_device_unlocked(base); CS_LOCK(base); } +EXPORT_SYMBOL_GPL(coresight_disclaim_device); /* enable or disable an associated CTI device of the supplied CS device */ static int @@ -467,6 +472,7 @@ void coresight_disable_path(struct list_head *path) { coresight_disable_path_from(path, NULL); } +EXPORT_SYMBOL_GPL(coresight_disable_path); int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) { @@ -1376,6 +1382,7 @@ int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) return -EAGAIN; } +EXPORT_SYMBOL_GPL(coresight_timeout); struct bus_type coresight_bustype = { .name = "coresight", @@ -1552,6 +1559,7 @@ bool coresight_loses_context_with_cpu(struct device *dev) return fwnode_property_present(dev_fwnode(dev), "arm,coresight-loses-context-with-cpu"); } +EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu); /* * coresight_alloc_device_name - Get an index for a given device in the -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1467BC433E1 for ; Fri, 21 Aug 2020 03:47:53 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DB4B120758 for ; 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Fri, 21 Aug 2020 03:45:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org A9AA5C433A0 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=tingwei@codeaurora.org From: Tingwei Zhang To: Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin , Mike Leach Subject: [PATCH v10 05/24] coresight: export global symbols Date: Fri, 21 Aug 2020 11:44:26 +0800 Message-Id: <20200821034445.967-6-tingwei@codeaurora.org> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20200821034445.967-1-tingwei@codeaurora.org> References: <20200821034445.967-1-tingwei@codeaurora.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200820_234543_567946_968D1BA3 X-CRM114-Status: GOOD ( 20.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tsoni@codeaurora.org, Sai Prakash Ranjan , Kim Phillips , Mao Jinlong , Greg Kroah-Hartman , coresight@lists.linaro.org, Randy Dunlap , Mian Yousaf Kaukab , Russell King , linux-kernel@vger.kernel.org, Tingwei Zhang , Leo Yan , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Mian Yousaf Kaukab Export symbols used among coresight modules. Signed-off-by: Mian Yousaf Kaukab Signed-off-by: Tingwei Zhang Tested-by: Mike Leach Reviewed-by: Suzuki K Poulose Reviewed-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm-perf.c | 1 + drivers/hwtracing/coresight/coresight-sysfs.c | 2 ++ drivers/hwtracing/coresight/coresight-tmc-etr.c | 6 ++++++ drivers/hwtracing/coresight/coresight.c | 8 ++++++++ 4 files changed, 17 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 1a3169e69bb1..dcb0592418ae 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -517,6 +517,7 @@ int etm_perf_symlink(struct coresight_device *csdev, bool link) return 0; } +EXPORT_SYMBOL_GPL(etm_perf_symlink); static ssize_t etm_perf_sink_name_show(struct device *dev, struct device_attribute *dattr, diff --git a/drivers/hwtracing/coresight/coresight-sysfs.c b/drivers/hwtracing/coresight/coresight-sysfs.c index 82afeaf2ccc4..34d2a2d31d00 100644 --- a/drivers/hwtracing/coresight/coresight-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-sysfs.c @@ -102,6 +102,7 @@ int coresight_add_sysfs_link(struct coresight_sysfs_link *info) return ret; } +EXPORT_SYMBOL_GPL(coresight_add_sysfs_link); void coresight_remove_sysfs_link(struct coresight_sysfs_link *info) { @@ -122,6 +123,7 @@ void coresight_remove_sysfs_link(struct coresight_sysfs_link *info) info->orig->nr_links--; info->target->nr_links--; } +EXPORT_SYMBOL_GPL(coresight_remove_sysfs_link); /* * coresight_make_links: Make a link for a connection from a @orig diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index b29c2db94d96..ad991a37e2d2 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -255,6 +255,7 @@ void tmc_free_sg_table(struct tmc_sg_table *sg_table) tmc_free_table_pages(sg_table); tmc_free_data_pages(sg_table); } +EXPORT_SYMBOL_GPL(tmc_free_sg_table); /* * Alloc pages for the table. Since this will be used by the device, @@ -340,6 +341,7 @@ struct tmc_sg_table *tmc_alloc_sg_table(struct device *dev, return sg_table; } +EXPORT_SYMBOL_GPL(tmc_alloc_sg_table); /* * tmc_sg_table_sync_data_range: Sync the data buffer written @@ -360,6 +362,7 @@ void tmc_sg_table_sync_data_range(struct tmc_sg_table *table, PAGE_SIZE, DMA_FROM_DEVICE); } } +EXPORT_SYMBOL_GPL(tmc_sg_table_sync_data_range); /* tmc_sg_sync_table: Sync the page table */ void tmc_sg_table_sync_table(struct tmc_sg_table *sg_table) @@ -372,6 +375,7 @@ void tmc_sg_table_sync_table(struct tmc_sg_table *sg_table) dma_sync_single_for_device(real_dev, table_pages->daddrs[i], PAGE_SIZE, DMA_TO_DEVICE); } +EXPORT_SYMBOL_GPL(tmc_sg_table_sync_table); /* * tmc_sg_table_get_data: Get the buffer pointer for data @offset @@ -401,6 +405,7 @@ ssize_t tmc_sg_table_get_data(struct tmc_sg_table *sg_table, *bufpp = page_address(data_pages->pages[pg_idx]) + pg_offset; return len; } +EXPORT_SYMBOL_GPL(tmc_sg_table_get_data); #ifdef ETR_SG_DEBUG /* Map a dma address to virtual address */ @@ -766,6 +771,7 @@ tmc_etr_get_catu_device(struct tmc_drvdata *drvdata) return NULL; } +EXPORT_SYMBOL_GPL(tmc_etr_get_catu_device); static inline int tmc_etr_enable_catu(struct tmc_drvdata *drvdata, struct etr_buf *etr_buf) diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index d515088cc47d..cd17aea6b50d 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -54,6 +54,7 @@ static struct list_head *stm_path; * it needs to look for another sync sequence. */ const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; +EXPORT_SYMBOL_GPL(coresight_barrier_pkt); static int coresight_id_match(struct device *dev, void *data) { @@ -179,6 +180,7 @@ int coresight_claim_device_unlocked(void __iomem *base) coresight_clear_claim_tags(base); return -EBUSY; } +EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked); int coresight_claim_device(void __iomem *base) { @@ -190,6 +192,7 @@ int coresight_claim_device(void __iomem *base) return rc; } +EXPORT_SYMBOL_GPL(coresight_claim_device); /* * coresight_disclaim_device_unlocked : Clear the claim tags for the device. @@ -208,6 +211,7 @@ void coresight_disclaim_device_unlocked(void __iomem *base) */ WARN_ON_ONCE(1); } +EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked); void coresight_disclaim_device(void __iomem *base) { @@ -215,6 +219,7 @@ void coresight_disclaim_device(void __iomem *base) coresight_disclaim_device_unlocked(base); CS_LOCK(base); } +EXPORT_SYMBOL_GPL(coresight_disclaim_device); /* enable or disable an associated CTI device of the supplied CS device */ static int @@ -467,6 +472,7 @@ void coresight_disable_path(struct list_head *path) { coresight_disable_path_from(path, NULL); } +EXPORT_SYMBOL_GPL(coresight_disable_path); int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) { @@ -1376,6 +1382,7 @@ int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) return -EAGAIN; } +EXPORT_SYMBOL_GPL(coresight_timeout); struct bus_type coresight_bustype = { .name = "coresight", @@ -1552,6 +1559,7 @@ bool coresight_loses_context_with_cpu(struct device *dev) return fwnode_property_present(dev_fwnode(dev), "arm,coresight-loses-context-with-cpu"); } +EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu); /* * coresight_alloc_device_name - Get an index for a given device in the -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel