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From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [RFC PATCH v7 14/21] riscv: Add support for kernel mode vector
Date: Fri, 11 Sep 2020 04:53:42 +0800	[thread overview]
Message-ID: <202009110450.0KgMHPMF%lkp@intel.com> (raw)
In-Reply-To: <a219f9213d1e8efec8e27498318f096ad4d505b2.1599719352.git.greentime.hu@sifive.com>

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Hi Greentime,

[FYI, it's a private test report for your RFC patch.]
[auto build test ERROR on linus/master]
[also build test ERROR on v5.9-rc4]
[cannot apply to next-20200910]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Greentime-Hu/riscv-Add-vector-ISA-support/20200910-163426
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 7fe10096c1508c7f033d34d0741809f8eecc1ed4
config: riscv-allmodconfig (attached as .config)
compiler: riscv64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=riscv 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   arch/riscv/kernel/kernel_mode_vector.c: Assembler messages:
   arch/riscv/kernel/kernel_mode_vector.c:88: Error: unrecognized opcode `vsetvli a5,x0,e8,m1'
>> arch/riscv/kernel/kernel_mode_vector.c:89: Error: unrecognized opcode `vmv.v.i v0,0'
   arch/riscv/kernel/kernel_mode_vector.c:90: Error: unrecognized opcode `vmv.v.i v1,0'
   arch/riscv/kernel/kernel_mode_vector.c:91: Error: unrecognized opcode `vmv.v.i v2,0'
   arch/riscv/kernel/kernel_mode_vector.c:92: Error: unrecognized opcode `vmv.v.i v3,0'
   arch/riscv/kernel/kernel_mode_vector.c:93: Error: unrecognized opcode `vmv.v.i v4,0'
   arch/riscv/kernel/kernel_mode_vector.c:94: Error: unrecognized opcode `vmv.v.i v5,0'
   arch/riscv/kernel/kernel_mode_vector.c:95: Error: unrecognized opcode `vmv.v.i v6,0'
   arch/riscv/kernel/kernel_mode_vector.c:96: Error: unrecognized opcode `vmv.v.i v7,0'
>> arch/riscv/kernel/kernel_mode_vector.c:97: Error: unrecognized opcode `vmv.v.i v8,0'
   arch/riscv/kernel/kernel_mode_vector.c:98: Error: unrecognized opcode `vmv.v.i v9,0'
   arch/riscv/kernel/kernel_mode_vector.c:99: Error: unrecognized opcode `vmv.v.i v10,0'
   arch/riscv/kernel/kernel_mode_vector.c:100: Error: unrecognized opcode `vmv.v.i v11,0'
   arch/riscv/kernel/kernel_mode_vector.c:101: Error: unrecognized opcode `vmv.v.i v12,0'
   arch/riscv/kernel/kernel_mode_vector.c:102: Error: unrecognized opcode `vmv.v.i v13,0'
   arch/riscv/kernel/kernel_mode_vector.c:103: Error: unrecognized opcode `vmv.v.i v14,0'
   arch/riscv/kernel/kernel_mode_vector.c:104: Error: unrecognized opcode `vmv.v.i v15,0'
>> arch/riscv/kernel/kernel_mode_vector.c:105: Error: unrecognized opcode `vmv.v.i v16,0'
   arch/riscv/kernel/kernel_mode_vector.c:106: Error: unrecognized opcode `vmv.v.i v17,0'
   arch/riscv/kernel/kernel_mode_vector.c:107: Error: unrecognized opcode `vmv.v.i v18,0'
   arch/riscv/kernel/kernel_mode_vector.c:108: Error: unrecognized opcode `vmv.v.i v19,0'
   arch/riscv/kernel/kernel_mode_vector.c:109: Error: unrecognized opcode `vmv.v.i v20,0'
   arch/riscv/kernel/kernel_mode_vector.c:110: Error: unrecognized opcode `vmv.v.i v21,0'
   arch/riscv/kernel/kernel_mode_vector.c:111: Error: unrecognized opcode `vmv.v.i v22,0'
   arch/riscv/kernel/kernel_mode_vector.c:112: Error: unrecognized opcode `vmv.v.i v23,0'
>> arch/riscv/kernel/kernel_mode_vector.c:113: Error: unrecognized opcode `vmv.v.i v24,0'
   arch/riscv/kernel/kernel_mode_vector.c:114: Error: unrecognized opcode `vmv.v.i v25,0'
   arch/riscv/kernel/kernel_mode_vector.c:115: Error: unrecognized opcode `vmv.v.i v26,0'
   arch/riscv/kernel/kernel_mode_vector.c:116: Error: unrecognized opcode `vmv.v.i v27,0'
   arch/riscv/kernel/kernel_mode_vector.c:117: Error: unrecognized opcode `vmv.v.i v28,0'
   arch/riscv/kernel/kernel_mode_vector.c:118: Error: unrecognized opcode `vmv.v.i v29,0'
   arch/riscv/kernel/kernel_mode_vector.c:119: Error: unrecognized opcode `vmv.v.i v30,0'
   arch/riscv/kernel/kernel_mode_vector.c:120: Error: unrecognized opcode `vmv.v.i v31,0'

# https://github.com/0day-ci/linux/commit/9bc3e08158278cd26d7e537b6315303de245cfbb
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Greentime-Hu/riscv-Add-vector-ISA-support/20200910-163426
git checkout 9bc3e08158278cd26d7e537b6315303de245cfbb
vim +89 arch/riscv/kernel/kernel_mode_vector.c

    83	
    84	static void vector_flush_cpu_state(void)
    85	{
    86		long tmp;
    87	
  > 88		__asm__ __volatile__ (
  > 89			"vsetvli %0, x0, e8, m1\n"
    90			"vmv.v.i v0, 0\n"
    91			"vmv.v.i v1, 0\n"
    92			"vmv.v.i v2, 0\n"
    93			"vmv.v.i v3, 0\n"
    94			"vmv.v.i v4, 0\n"
    95			"vmv.v.i v5, 0\n"
  > 96			"vmv.v.i v6, 0\n"
  > 97			"vmv.v.i v7, 0\n"
    98			"vmv.v.i v8, 0\n"
    99			"vmv.v.i v9, 0\n"
   100			"vmv.v.i v10, 0\n"
   101			"vmv.v.i v11, 0\n"
   102			"vmv.v.i v12, 0\n"
   103			"vmv.v.i v13, 0\n"
 > 104			"vmv.v.i v14, 0\n"
 > 105			"vmv.v.i v15, 0\n"
   106			"vmv.v.i v16, 0\n"
   107			"vmv.v.i v17, 0\n"
   108			"vmv.v.i v18, 0\n"
   109			"vmv.v.i v19, 0\n"
   110			"vmv.v.i v20, 0\n"
   111			"vmv.v.i v21, 0\n"
   112			"vmv.v.i v22, 0\n"
 > 113			"vmv.v.i v23, 0\n"
   114			"vmv.v.i v24, 0\n"
   115			"vmv.v.i v25, 0\n"
   116			"vmv.v.i v26, 0\n"
   117			"vmv.v.i v27, 0\n"
   118			"vmv.v.i v28, 0\n"
   119			"vmv.v.i v29, 0\n"
   120			"vmv.v.i v30, 0\n"
   121			"vmv.v.i v31, 0\n":"=r"(tmp)::);
   122	}
   123	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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  reply	other threads:[~2020-09-10 20:53 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-10  8:11 [RFC PATCH v7 00/21] riscv: Add vector ISA support Greentime Hu
2020-09-10  8:11 ` Greentime Hu
2020-09-10  8:11 ` [RFC PATCH v7 01/21] riscv: Separate patch for cflags and aflags Greentime Hu
2020-09-10  8:11   ` Greentime Hu
2020-09-10  8:11 ` [RFC PATCH v7 02/21] riscv: Rename __switch_to_aux -> fpu Greentime Hu
2020-09-10  8:11   ` Greentime Hu
2020-09-10  8:11 ` [RFC PATCH v7 03/21] riscv: Extending cpufeature.c to detect V-extension Greentime Hu
2020-09-10  8:11   ` Greentime Hu
2020-09-10  8:11 ` [RFC PATCH v7 04/21] riscv: Add new csr defines related to vector extension Greentime Hu
2020-09-10  8:11   ` Greentime Hu
2020-09-10  8:12 ` [RFC PATCH v7 05/21] riscv: Add vector feature to compile Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10  8:12 ` [RFC PATCH v7 06/21] riscv: Add has_vector/riscv_vsize to save vector features Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10  8:12 ` [RFC PATCH v7 07/21] riscv: Reset vector register Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10  8:12 ` [RFC PATCH v7 08/21] riscv: Add vector struct and assembler definitions Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10  8:12 ` [RFC PATCH v7 09/21] riscv: Add task switch support for vector Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10 15:48   ` kernel test robot
2020-09-10  8:12 ` [RFC PATCH v7 10/21] " Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10  8:12 ` [RFC PATCH v7 11/21] riscv: Add ptrace vector support Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10  8:12 ` [RFC PATCH v7 12/21] riscv: Add sigcontext save/restore for vector Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10  8:12 ` [RFC PATCH v7 13/21] riscv: signal: Report signal frame size to userspace via auxv Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10 18:35   ` kernel test robot
2020-09-10  8:12 ` [RFC PATCH v7 14/21] riscv: Add support for kernel mode vector Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10 20:53   ` kernel test robot [this message]
2020-09-10  8:12 ` [RFC PATCH v7 15/21] riscv: Use CSR_STATUS to replace sstatus in vector.S Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10  8:12 ` [RFC PATCH v7 16/21] riscv: Add vector extension XOR implementation Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10  8:12 ` [RFC PATCH v7 17/21] riscv: Initialize vector registers with proper vsetvli then it can work normally Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10  8:12 ` [RFC PATCH v7 18/21] riscv: Optimize vector registers initialization Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10 23:33   ` kernel test robot
2020-09-10  8:12 ` [RFC PATCH v7 19/21] riscv: Fix an illegal instruction exception when accessing vlenb without enable vector first Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10  8:12 ` [RFC PATCH v7 20/21] riscv: Allocate space for vector registers in start_thread() Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-10  8:12 ` [RFC PATCH v7 21/21] riscv: Optimize task switch codes of vector Greentime Hu
2020-09-10  8:12   ` Greentime Hu
2020-09-11  2:13   ` kernel test robot

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