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From: Igor Mammedov <imammedo@redhat.com>
To: Gerd Hoffmann <kraxel@redhat.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>,
	Sergio Lopez <slp@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	qemu-devel@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <rth@twiddle.net>
Subject: Re: [PATCH 4/4] microvm: reconfigure irqs if second ioapic is available
Date: Fri, 23 Oct 2020 20:52:09 +0200	[thread overview]
Message-ID: <20201023205209.7b6258d7@redhat.com> (raw)
In-Reply-To: <20201016114328.18835-5-kraxel@redhat.com>

On Fri, 16 Oct 2020 13:43:28 +0200
Gerd Hoffmann <kraxel@redhat.com> wrote:

> Use GSI 16+ for PCIe (needs acpi_build_madt() tweak).
> Use GSI 24+ (second ioapic) for virtio-mmio.
> Use all irq lines of the second ioapic
> and allow up to 24 virtio-mmio devices.

description is  missing answer to question why it's done.


> 
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  hw/i386/acpi-common.c | 2 +-
>  hw/i386/microvm.c     | 6 +++++-
>  2 files changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c
> index f0689392a39f..1653a8315248 100644
> --- a/hw/i386/acpi-common.c
> +++ b/hw/i386/acpi-common.c
> @@ -122,7 +122,7 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
>          intsrcovr->flags  = cpu_to_le16(0); /* conforms to bus specifications */
>      }
>  
> -    for (i = 1; i < 16; i++) {
> +    for (i = 1; i < 24; i++) {
>          if (!(x86ms->pci_irq_mask & (1 << i))) {
>              /* No need for a INT source override structure. */
>              continue;
> diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
> index 15c3e078a4aa..70bb8a4e3954 100644
> --- a/hw/i386/microvm.c
> +++ b/hw/i386/microvm.c
> @@ -205,7 +205,11 @@ static void microvm_devices_init(MicrovmMachineState *mms)
>  
>      mms->virtio_irq_base = 5;
>      mms->virtio_num_transports = 8;
> -    if (x86_machine_is_acpi_enabled(x86ms)) {
> +    if (ioapic2) {
> +        mms->pcie_irq_base = 16;
> +        mms->virtio_irq_base = 24;
> +        mms->virtio_num_transports = 24;
> +    } else if (x86_machine_is_acpi_enabled(x86ms)) {
>          mms->pcie_irq_base = 12;
>          mms->virtio_irq_base = 16;
>      }



  reply	other threads:[~2020-10-23 18:56 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-16 11:43 [PATCH 0/4] RfC: microvm: add second ioapic Gerd Hoffmann
2020-10-16 11:43 ` [PATCH 1/4] microvm: make number of virtio transports runtime configurable Gerd Hoffmann
2020-10-23 19:00   ` Igor Mammedov
2020-10-26  7:04     ` Gerd Hoffmann
2020-10-16 11:43 ` [PATCH 2/4] microvm: make pcie irq base " Gerd Hoffmann
2020-10-23 18:58   ` Igor Mammedov
2020-10-16 11:43 ` [PATCH 3/4] microvm: add second ioapic Gerd Hoffmann
2020-10-23 18:56   ` Igor Mammedov
2020-10-16 11:43 ` [PATCH 4/4] microvm: reconfigure irqs if second ioapic is available Gerd Hoffmann
2020-10-23 18:52   ` Igor Mammedov [this message]
2020-10-26  8:25     ` Gerd Hoffmann
2020-10-16 13:16 ` [PATCH 0/4] RfC: microvm: add second ioapic Philippe Mathieu-Daudé
2020-10-19  7:07   ` Gerd Hoffmann
2020-10-19  8:32     ` Philippe Mathieu-Daudé
2020-10-19  9:09     ` Gerd Hoffmann

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