From mboxrd@z Thu Jan 1 00:00:00 1970 From: Siew Chin Lim Date: Mon, 9 Nov 2020 22:44:19 -0800 Subject: [RESEND v2 02/22] arm: socfpga: dm: Add base address for Intel Diamond Mesa In-Reply-To: <20201110064439.9683-1-elly.siew.chin.lim@intel.com> References: <20201110064439.9683-1-elly.siew.chin.lim@intel.com> Message-ID: <20201110064439.9683-3-elly.siew.chin.lim@intel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Reuse base_addr_s10.h for Diamond Mesa, the address is the same as Agilex. Signed-off-by: Siew Chin Lim --- arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h index d3eca65e97..eef88a7fc3 100644 --- a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h +++ b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h @@ -10,7 +10,7 @@ #define SOCFPGA_SDR_SCHEDULER_ADDRESS 0xf8000400 #define SOCFPGA_HMC_MMR_IO48_ADDRESS 0xf8010000 #define SOCFPGA_SDR_ADDRESS 0xf8011000 -#ifdef CONFIG_TARGET_SOCFPGA_AGILEX +#if defined(CONFIG_TARGET_SOCFPGA_AGILEX) || defined(CONFIG_TARGET_SOCFPGA_DM) #define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS 0xf8020200 #else #define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS 0xf8020100 -- 2.13.0