Re: [patch 4/8] rtc: core: Make the sync offset default more realistic

From: Jason Gunthorpe <jgg@ziepe.ca>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: LKML <linux-kernel@vger.kernel.org>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Miroslav Lichvar <mlichvar@redhat.com>,
	John Stultz <john.stultz@linaro.org>,
	Prarit Bhargava <prarit@redhat.com>,
	Alessandro Zummo <a.zummo@towertech.it>,
	linux-rtc@vger.kernel.org, Peter Zijlstra <peterz@infradead.org>
Subject: Re: [patch 4/8] rtc: core: Make the sync offset default more realistic
Date: Mon, 7 Dec 2020 16:55:32 -0400	[thread overview]
Message-ID: <20201207205532.GJ5487@ziepe.ca> (raw)
In-Reply-To: <20201206220541.960333166@linutronix.de>

On Sun, Dec 06, 2020 at 10:46:17PM +0100, Thomas Gleixner wrote:
> The offset which is used to steer the start of an RTC synchronization
> update via rtc_set_ntp_time() is huge. The math behind this is:
> 
>   tsched       twrite(t2.tv_sec - 1) 	 t2 (seconds increment)
> 
> twrite - tsched is the transport time for the write to hit the device.
> 
> t2 - twrite depends on the chip and is for most chips one second.
> 
> The rtc_set_ntp_time() calculation of tsched is:
> 
>     tsched = t2 - 1sec - (t2 - twrite)
> 
> The default for the sync offset is 500ms which means that twrite - tsched
> is 500ms assumed that t2 - twrite is one second.
> 
> This is 0.5 seconds off for RTCs which are directly accessible by IO writes
> and probably for the majority of i2C/SPI based RTC off by an order of
> magnitude. Set it to 10ms which should bring it closer to reality.
> 
> The default can be adjusted by drivers (rtc_cmos does so) and could be
> adjusted further by a calibration method which is an orthogonal problem.
> 
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
>  drivers/rtc/class.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> +++ b/drivers/rtc/class.c
> @@ -201,7 +201,7 @@ static struct rtc_device *rtc_allocate_d
>  	device_initialize(&rtc->dev);
>  
>  	/* Drivers can revise this default after allocating the device. */
> -	rtc->set_offset_nsec =  NSEC_PER_SEC / 2;
> +	rtc->set_offset_nsec =  10 * NSEC_PER_MSEC;

So the old value is clearly wrong for CMOS, and I have a strong
feeling this was an error and it should have been -NSEC_PER_SEC/2

I have no idea if CMOS behavior or 0s behavior is more common in the
rtclib drivers, but it seems since nobody noticed the huge offset
mistake in 3 years it doesn't actually really matter.

Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>

Jason