From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7754EC4167B for ; Wed, 9 Dec 2020 14:30:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3B58622AAE for ; Wed, 9 Dec 2020 14:30:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732847AbgLIO3x (ORCPT ); Wed, 9 Dec 2020 09:29:53 -0500 Received: from esa.microchip.iphmx.com ([68.232.153.233]:13758 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730096AbgLIO3u (ORCPT ); Wed, 9 Dec 2020 09:29:50 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1607524191; x=1639060191; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mS54WkIx0/Otie3EKGgQJvF/hN9NwPNndxKOsMXjpRI=; b=SuVGH+rwXjwvZRMedz1UR1FkSlOuji68KPu9zD/GPdL1DrwX2KSJ18+3 4waun2Id5luQ6x7pWdsloYy7duwZVLqyMo14w/esf3SLHg3VyPKI/N0n+ /XUx+Xmqmdr+UuLWwNrEppmmQYfPGkBwvIqphL9H9iSOD3y205S09og/j h7uX5LuncNBWjEf7Fih0iEtHgIlfYHHGjUSi4IWLTdsNH78FvkmcfJTpc eDFle8meoh83EvTSeLEkiTia/t0Ab97nIQlU8bmEWp8baBHUubsc/OtTA Wbtyt0vgnoscr/8Gw5X5zDEHrpNUgxHrNC46+zooCZ8bim51V8MDLQrfa g==; IronPort-SDR: POpRHDGbTGiQBzzOtUaSd/N4rYawl+pre6aYmBSoYhsA/vYp5d4/1Qnm5wuxp4rFIJzgLl+BM/ xCttMzV+G0nh0wu1xobUF5Tvb0MmalWN8Ockm4BEoZeDNUSDJdZy9tYj0IEDbPmigxSDAsUQGb IJsLPG6oEsqzCNiRQL6frfae3fBJLOEkV/JwNkDJIG+pKfeYRrdN/bAZUerysJnBLAzle+evFR eBkIDroYOJgRDewuoHxKVw/QGW7Q/FfBmOT99KlnyMdfx2BwRsCARZqAbbDfu0o7X9piRQeQC6 K/Q= X-IronPort-AV: E=Sophos;i="5.78,405,1599548400"; d="scan'208";a="101529705" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Dec 2020 07:28:35 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Wed, 9 Dec 2020 07:28:34 -0700 Received: from soft-dev10.microsemi.net (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Wed, 9 Dec 2020 07:28:32 -0700 From: Lars Povlsen To: Linus Walleij CC: Lars Povlsen , Microchip Linux Driver Support , , , , , Alexandre Belloni Subject: [PATCH -next 3/3] arm64: dts: sparx5: Add SGPIO irq support Date: Wed, 9 Dec 2020 15:27:53 +0100 Message-ID: <20201209142753.683208-4-lars.povlsen@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201209142753.683208-1-lars.povlsen@microchip.com> References: <20201209142753.683208-1-lars.povlsen@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This enables irq support for the SGPIO input banks, allowing SGPIO control signals to generate interrupts based on the signal state. This f.ex. allows the SFP driver to avoid polling of module detect, tx fault, loss of signal etc. control signals that may be connected via the SGPIO controller. Signed-off-by: Lars Povlsen --- arch/arm64/boot/dts/microchip/sparx5.dtsi | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi index 3bb4755e9f87..044063a9beae 100644 --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi @@ -277,13 +277,16 @@ sgpio0: gpio@61101036c { clocks = <&sys_clk>; pinctrl-0 = <&sgpio0_pins>; pinctrl-names = "default"; - reg = <0x6 0x1101036c 0x100>; + reg = <0x6 0x1101036c 0x118>; sgpio_in0: gpio@0 { compatible = "microchip,sparx5-sgpio-bank"; reg = <0>; gpio-controller; #gpio-cells = <3>; ngpios = <96>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; }; sgpio_out0: gpio@1 { compatible = "microchip,sparx5-sgpio-bank"; @@ -309,6 +312,9 @@ sgpio_in1: gpio@0 { gpio-controller; #gpio-cells = <3>; ngpios = <96>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; }; sgpio_out1: gpio@1 { compatible = "microchip,sparx5-sgpio-bank"; @@ -334,6 +340,9 @@ sgpio_in2: gpio@0 { gpio-controller; #gpio-cells = <3>; ngpios = <96>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; }; sgpio_out2: gpio@1 { compatible = "microchip,sparx5-sgpio-bank"; -- 2.25.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADB55C4167B for ; Wed, 9 Dec 2020 14:29:46 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5ED3D22AAA for ; Wed, 9 Dec 2020 14:29:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5ED3D22AAA Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=4VdG18KVjS8yyNtPwUb0Zs2rHCc7MMoAcqVTNMHjg1c=; b=eAz9aUtYLJJbGtZD0DccRwdBb Cbu31EYXfaaBhfCXP32WGZaeNAaa8AIAInUtm0iIrRIl1LbhC+mhfPeGxZ9RZJiXB2QLhnT6/QIj2 Zi9JwTnSXwch1i4HTfMbzvGC4uCgSIVGYFvtUSyZY4cUTmF0HdrGuEi3tumbMZDKbOestvnfawonj KGVTVCZe2OgaSdu2SOzP5ORLDt46xEHBcyQW97x7C9hhZqQosSYpDCtDbGgJ4ZvE2DstdGmgOW0EE jDUkUi9CpqYPtm3KGwnG262U/l9xHXARrblxvPHn6n5InZl2nosPTppscgUOoHtm4uhvmo3T7qkrh 6TuJITWwQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kn0SN-0003jn-7l; Wed, 09 Dec 2020 14:28:39 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kn0SJ-0003j9-Mk for linux-arm-kernel@lists.infradead.org; Wed, 09 Dec 2020 14:28:36 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1607524116; x=1639060116; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mS54WkIx0/Otie3EKGgQJvF/hN9NwPNndxKOsMXjpRI=; b=Xs36T5qHHkPfDF7uSRIhKOTYKBcOICDRKUlguOMtmi9G20xANnFQWs1Z XiUOpfzFzqnSN3n+4Qo9JzG6d2TsFZ9J+IBfSUKxqTbA+mZH09CLkMnhm LCkCIZ/7x191PNvWAjtoUtBe6q2IyvqB5BHDbAen8PxdUfzBQi5osUCs2 8JKRXhmvpg1LYWOrhaehiugRr5SNKBJSRGlLP2zjkQPXYh5vrti1LYh3c 3C8kNJxy0wXDttpsABThJznCH3cL8SK/ZktYQxAf+JosYeLpbIpuKsPGf fwS5CJDnaMLP3j/WUUW7P3iLgqsBGgThJGMENOPlHVTgDbEdq3p3C9Aq6 w==; IronPort-SDR: POpRHDGbTGiQBzzOtUaSd/N4rYawl+pre6aYmBSoYhsA/vYp5d4/1Qnm5wuxp4rFIJzgLl+BM/ xCttMzV+G0nh0wu1xobUF5Tvb0MmalWN8Ockm4BEoZeDNUSDJdZy9tYj0IEDbPmigxSDAsUQGb IJsLPG6oEsqzCNiRQL6frfae3fBJLOEkV/JwNkDJIG+pKfeYRrdN/bAZUerysJnBLAzle+evFR eBkIDroYOJgRDewuoHxKVw/QGW7Q/FfBmOT99KlnyMdfx2BwRsCARZqAbbDfu0o7X9piRQeQC6 K/Q= X-IronPort-AV: E=Sophos;i="5.78,405,1599548400"; d="scan'208";a="101529705" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 Dec 2020 07:28:35 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Wed, 9 Dec 2020 07:28:34 -0700 Received: from soft-dev10.microsemi.net (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Wed, 9 Dec 2020 07:28:32 -0700 From: Lars Povlsen To: Linus Walleij Subject: [PATCH -next 3/3] arm64: dts: sparx5: Add SGPIO irq support Date: Wed, 9 Dec 2020 15:27:53 +0100 Message-ID: <20201209142753.683208-4-lars.povlsen@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201209142753.683208-1-lars.povlsen@microchip.com> References: <20201209142753.683208-1-lars.povlsen@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201209_092835_899018_FA4D20A7 X-CRM114-Status: GOOD ( 12.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Alexandre Belloni , linux-kernel@vger.kernel.org, Microchip Linux Driver Support , linux-gpio@vger.kernel.org, Lars Povlsen , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This enables irq support for the SGPIO input banks, allowing SGPIO control signals to generate interrupts based on the signal state. This f.ex. allows the SFP driver to avoid polling of module detect, tx fault, loss of signal etc. control signals that may be connected via the SGPIO controller. Signed-off-by: Lars Povlsen --- arch/arm64/boot/dts/microchip/sparx5.dtsi | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi index 3bb4755e9f87..044063a9beae 100644 --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi @@ -277,13 +277,16 @@ sgpio0: gpio@61101036c { clocks = <&sys_clk>; pinctrl-0 = <&sgpio0_pins>; pinctrl-names = "default"; - reg = <0x6 0x1101036c 0x100>; + reg = <0x6 0x1101036c 0x118>; sgpio_in0: gpio@0 { compatible = "microchip,sparx5-sgpio-bank"; reg = <0>; gpio-controller; #gpio-cells = <3>; ngpios = <96>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; }; sgpio_out0: gpio@1 { compatible = "microchip,sparx5-sgpio-bank"; @@ -309,6 +312,9 @@ sgpio_in1: gpio@0 { gpio-controller; #gpio-cells = <3>; ngpios = <96>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; }; sgpio_out1: gpio@1 { compatible = "microchip,sparx5-sgpio-bank"; @@ -334,6 +340,9 @@ sgpio_in2: gpio@0 { gpio-controller; #gpio-cells = <3>; ngpios = <96>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; }; sgpio_out2: gpio@1 { compatible = "microchip,sparx5-sgpio-bank"; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel