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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: [Intel-gfx] [PATCH 40/56] drm/i915: Move saturated workload detection back to the context
Date: Tue, 29 Dec 2020 12:01:29 +0000	[thread overview]
Message-ID: <20201229120145.26045-40-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20201229120145.26045-1-chris@chris-wilson.co.uk>

When we introduced the saturated workload detection to tell us to back
off from semaphore usage [semaphores have a noticeable impact on
contended bus cycles with the CPU for some heavy workloads], we first
introduced it as a per-context tracker. This allows individual contexts
to try and optimise their own usage, but we found that with the local
tracking and the no-semaphore boosting, the first context to disable
semaphores got a massive priority boost and so would starve the rest and
all new contexts (as they started with semaphores enabled and lower
priority). Hence we moved the saturated workload detection to the
engine, and a consequence had to disable semaphores on virtual engines.

Now that we do not have semaphore priority boosting, and try to fairly
schedule irrespective of semaphore usage, we can move the tracking back
to the context and virtual engines can now utilise the faster inter-engine
synchronisation. If we see that any context fairs to use the semaphore,
because the system is oversubscribed and was busy doing something else
instead of spinning on the semaphore, we disable further usage of
semaphores with that context until it idles again. This should restrict
the semaphores to lightly utilised system where the latency between
requests is more noticeable, and curtail the bus-contention from checking
for signaled semaphores.

References: 44d89409a12e ("drm/i915: Make the semaphore saturation mask global")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_context.c           |  3 +++
 drivers/gpu/drm/i915/gt/intel_context_types.h     |  2 ++
 drivers/gpu/drm/i915/gt/intel_engine_pm.c         |  2 --
 drivers/gpu/drm/i915/gt/intel_engine_types.h      |  2 --
 .../gpu/drm/i915/gt/intel_execlists_submission.c  | 15 ---------------
 drivers/gpu/drm/i915/i915_request.c               |  4 ++--
 6 files changed, 7 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c
index 349e7fa1488d..b3eb7513659b 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -345,6 +345,9 @@ static int __intel_context_active(struct i915_active *active)
 {
 	struct intel_context *ce = container_of(active, typeof(*ce), active);
 
+	CE_TRACE(ce, "active\n");
+	ce->saturated = 0;
+
 	intel_context_get(ce);
 
 	/* everything should already be activated by intel_context_pre_pin() */
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h b/drivers/gpu/drm/i915/gt/intel_context_types.h
index 679b268f0911..f3e04ae53c51 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -103,6 +103,8 @@ struct intel_context {
 	} lrc;
 	u32 tag; /* cookie passed to HW to track this context on submission */
 
+	intel_engine_mask_t saturated; /* submitting semaphores too late? */
+
 	/* Time on GPU as tracked by the hw. */
 	struct {
 		struct ewma_runtime avg;
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 511a379c794d..64b9b857c71c 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -254,8 +254,6 @@ static int __engine_park(struct intel_wakeref *wf)
 	struct intel_engine_cs *engine =
 		container_of(wf, typeof(*engine), wakeref);
 
-	engine->saturated = 0;
-
 	/*
 	 * If one and only one request is completed between pm events,
 	 * we know that we are inside the kernel context and it is
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 824a187b2803..74e55e0fbc65 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -304,8 +304,6 @@ struct intel_engine_cs {
 
 	struct intel_context *kernel_context; /* pinned */
 
-	intel_engine_mask_t saturated; /* submitting semaphores too late? */
-
 	struct {
 		struct delayed_work work;
 		struct i915_request *systole;
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 6d5a5e881335..8527bb8abadd 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -3333,21 +3333,6 @@ intel_execlists_create_virtual(struct intel_engine_cs **siblings,
 	ve->base.instance = I915_ENGINE_CLASS_INVALID_VIRTUAL;
 	ve->base.uabi_instance = I915_ENGINE_CLASS_INVALID_VIRTUAL;
 
-	/*
-	 * The decision on whether to submit a request using semaphores
-	 * depends on the saturated state of the engine. We only compute
-	 * this during HW submission of the request, and we need for this
-	 * state to be globally applied to all requests being submitted
-	 * to this engine. Virtual engines encompass more than one physical
-	 * engine and so we cannot accurately tell in advance if one of those
-	 * engines is already saturated and so cannot afford to use a semaphore
-	 * and be pessimized in priority for doing so -- if we are the only
-	 * context using semaphores after all other clients have stopped, we
-	 * will be starved on the saturated system. Such a global switch for
-	 * semaphores is less than ideal, but alas is the current compromise.
-	 */
-	ve->base.saturated = ALL_ENGINES;
-
 	snprintf(ve->base.name, sizeof(ve->base.name), "virtual");
 
 	i915_sched_init_engine(&ve->base.active, ENGINE_VIRTUAL);
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 3f9bcc427d07..d73f4085f227 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -569,7 +569,7 @@ bool __i915_request_submit(struct i915_request *request)
 	 */
 	if (request->sched.semaphores &&
 	    i915_sw_fence_signaled(&request->semaphore))
-		engine->saturated |= request->sched.semaphores;
+		request->context->saturated |= request->sched.semaphores;
 
 	engine->emit_fini_breadcrumb(request,
 				     request->ring->vaddr + request->postfix);
@@ -1030,7 +1030,7 @@ already_busywaiting(struct i915_request *rq)
 	 *
 	 * See the are-we-too-late? check in __i915_request_submit().
 	 */
-	return rq->sched.semaphores | READ_ONCE(rq->engine->saturated);
+	return rq->sched.semaphores | READ_ONCE(rq->context->saturated);
 }
 
 static int
-- 
2.20.1

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  parent reply	other threads:[~2020-12-29 12:02 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-29 12:00 [Intel-gfx] [PATCH 01/56] drm/i915/gt: Restore ce->signal flush before releasing virtual engine Chris Wilson
2020-12-29 12:00 ` [Intel-gfx] [PATCH 02/56] drm/i915/gt: Only retire on the last breadcrumb if the last request Chris Wilson
2020-12-29 12:00 ` [Intel-gfx] [PATCH 03/56] drm/i915/gt: Cancel submitted requests upon context reset Chris Wilson
2020-12-30 21:07   ` Mika Kuoppala
2020-12-29 12:00 ` [Intel-gfx] [PATCH 04/56] drm/i915/gt: Pull context closure check from request submit to schedule-in Chris Wilson
2020-12-29 12:00 ` [Intel-gfx] [PATCH 05/56] drm/i915/gem: Peek at the inflight context Chris Wilson
2020-12-29 12:00 ` [Intel-gfx] [PATCH 06/56] drm/i915: Mark up protected uses of 'i915_request_completed' Chris Wilson
2020-12-29 12:00 ` [Intel-gfx] [PATCH 07/56] drm/i915: Drop i915_request.lock serialisation around await_start Chris Wilson
2020-12-29 12:00 ` [Intel-gfx] [PATCH 08/56] drm/i915: Drop i915_request.lock requirement for intel_rps_boost() Chris Wilson
2020-12-29 12:00 ` [Intel-gfx] [PATCH 09/56] drm/i915/gem: Reduce ctx->engine_mutex for reading the clone source Chris Wilson
2020-12-29 12:00 ` [Intel-gfx] [PATCH 10/56] drm/i915/gem: Reduce ctx->engines_mutex for get_engines() Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 11/56] drm/i915: Reduce test_and_set_bit to set_bit in i915_request_submit() Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 12/56] drm/i915/gt: Drop atomic for engine->fw_active tracking Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 13/56] drm/i915/gt: Extract busy-stats for ring-scheduler Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 14/56] drm/i915/gt: Convert stats.active to plain unsigned int Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 15/56] drm/i915/gt: Do not suspend bonded requests if one hangs Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 16/56] drm/i915/gt: Remove timeslice suppression Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 17/56] drm/i915/gt: Skip over completed active execlists, again Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 18/56] drm/i915: Strip out internal priorities Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 19/56] drm/i915: Remove I915_USER_PRIORITY_SHIFT Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 20/56] drm/i915: Replace engine->schedule() with a known request operation Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 21/56] drm/i915: Teach the i915_dependency to use a double-lock Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 22/56] drm/i915: Restructure priority inheritance Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 23/56] drm/i915/selftests: Measure set-priority duration Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 24/56] drm/i915/selftests: Exercise priority inheritance around an engine loop Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 25/56] drm/i915: Improve DFS for priority inheritance Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 26/56] drm/i915: Extract request submission from execlists Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 27/56] drm/i915: Extract request rewinding " Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 28/56] drm/i915: Extract request suspension from the execlists backend Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 29/56] drm/i915: Extract the ability to defer and rerun a request later Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 30/56] drm/i915: Fix the iterative dfs for defering requests Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 31/56] drm/i915: Move common active lists from engine to i915_scheduler Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 32/56] drm/i915: Move scheduler queue Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 33/56] drm/i915: Move tasklet from execlists to sched Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 34/56] drm/i915: Replace priolist rbtree with a skiplist Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 35/56] drm/i915: Wrap cmpxchg64 with try_cmpxchg64() helper Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 36/56] drm/i915: Fair low-latency scheduling Chris Wilson
2021-01-07 16:05   ` Matthew Brost
2021-01-07 16:45     ` Chris Wilson
2021-01-07 17:10       ` Matthew Brost
2020-12-29 12:01 ` [Intel-gfx] [PATCH 37/56] drm/i915/gt: Specify a deadline for the heartbeat Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 38/56] drm/i915: Extend the priority boosting for the display with a deadline Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 39/56] drm/i915/gt: Support virtual engine queues Chris Wilson
2020-12-29 12:01 ` Chris Wilson [this message]
2020-12-29 12:01 ` [Intel-gfx] [PATCH 41/56] drm/i915: Bump default timeslicing quantum to 5ms Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 42/56] drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 43/56] drm/i915/gt: Track timeline GGTT offset separately from subpage offset Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 44/56] drm/i915/gt: Add timeline "mode" Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 45/56] drm/i915/gt: Use indices for writing into relative timelines Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 46/56] drm/i915/selftests: Exercise relative timeline modes Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 47/56] drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 48/56] Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq" Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 49/56] drm/i915/gt: Couple tasklet scheduling for all CS interrupts Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 50/56] drm/i915/gt: Support creation of 'internal' rings Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 51/56] drm/i915/gt: Use client timeline address for seqno writes Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 52/56] drm/i915/gt: Infrastructure for ring scheduling Chris Wilson
2020-12-29 18:34   ` kernel test robot
2020-12-29 18:34     ` kernel test robot
2020-12-29 12:01 ` [Intel-gfx] [PATCH 53/56] drm/i915/gt: Enable busy-stats for ring-scheduler Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 54/56] drm/i915/gt: Implement ring scheduler for gen6/7 Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 55/56] drm/i915/gt: Enable ring scheduling " Chris Wilson
2020-12-29 12:01 ` [Intel-gfx] [PATCH 56/56] drm/i915/gt: Limit C-states while waiting for requests Chris Wilson
2020-12-29 12:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/56] drm/i915/gt: Restore ce->signal flush before releasing virtual engine Patchwork
2020-12-29 12:22 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-12-29 12:49 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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