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From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [PATCH v5 4/9] mmc: cqhci: add support for inline encryption
Date: Thu, 21 Jan 2021 20:44:27 +0800	[thread overview]
Message-ID: <202101212049.WP1wut0i-lkp@intel.com> (raw)
In-Reply-To: <20210121090140.326380-5-ebiggers@kernel.org>

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Hi Eric,

I love your patch! Yet something to improve:

[auto build test ERROR on robh/for-next]
[also build test ERROR on linus/master v5.11-rc4 next-20210121]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Eric-Biggers/mmc-add-basic-support-for-inline-encryption/20210121-180505
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arc-allyesconfig (attached as .config)
compiler: arceb-elf-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/c5658e96c3e056ebf966e683859fa165948d1660
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Eric-Biggers/mmc-add-basic-support-for-inline-encryption/20210121-180505
        git checkout c5658e96c3e056ebf966e683859fa165948d1660
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   drivers/mmc/host/cqhci-crypto.c: In function 'cqhci_crypto_init':
>> drivers/mmc/host/cqhci-crypto.c:198:8: error: implicit declaration of function 'devm_blk_ksm_init'; did you mean 'blk_ksm_init'? [-Werror=implicit-function-declaration]
     198 |  err = devm_blk_ksm_init(dev, ksm, num_keyslots);
         |        ^~~~~~~~~~~~~~~~~
         |        blk_ksm_init
   cc1: some warnings being treated as errors


vim +198 drivers/mmc/host/cqhci-crypto.c

   149	
   150	/**
   151	 * cqhci_crypto_init - initialize CQHCI crypto support
   152	 * @cq_host: a cqhci host
   153	 *
   154	 * If the driver previously set MMC_CAP2_CRYPTO and the CQE declares
   155	 * CQHCI_CAP_CS, initialize the crypto support.  This involves reading the
   156	 * crypto capability registers, initializing the keyslot manager, clearing all
   157	 * keyslots, and enabling 128-bit task descriptors.
   158	 *
   159	 * Return: 0 if crypto was initialized or isn't supported; whether
   160	 *	   MMC_CAP2_CRYPTO remains set indicates which one of those cases it is.
   161	 *	   Also can return a negative errno value on unexpected error.
   162	 */
   163	int cqhci_crypto_init(struct cqhci_host *cq_host)
   164	{
   165		struct mmc_host *mmc = cq_host->mmc;
   166		struct device *dev = mmc_dev(mmc);
   167		struct blk_keyslot_manager *ksm = &mmc->ksm;
   168		unsigned int num_keyslots;
   169		unsigned int cap_idx;
   170		enum blk_crypto_mode_num blk_mode_num;
   171		unsigned int slot;
   172		int err = 0;
   173	
   174		if (!(mmc->caps2 & MMC_CAP2_CRYPTO) ||
   175		    !(cqhci_readl(cq_host, CQHCI_CAP) & CQHCI_CAP_CS))
   176			goto out;
   177	
   178		cq_host->crypto_capabilities.reg_val =
   179				cpu_to_le32(cqhci_readl(cq_host, CQHCI_CCAP));
   180	
   181		cq_host->crypto_cfg_register =
   182			(u32)cq_host->crypto_capabilities.config_array_ptr * 0x100;
   183	
   184		cq_host->crypto_cap_array =
   185			devm_kcalloc(dev, cq_host->crypto_capabilities.num_crypto_cap,
   186				     sizeof(cq_host->crypto_cap_array[0]), GFP_KERNEL);
   187		if (!cq_host->crypto_cap_array) {
   188			err = -ENOMEM;
   189			goto out;
   190		}
   191	
   192		/*
   193		 * CCAP.CFGC is off by one, so the actual number of crypto
   194		 * configurations (a.k.a. keyslots) is CCAP.CFGC + 1.
   195		 */
   196		num_keyslots = cq_host->crypto_capabilities.config_count + 1;
   197	
 > 198		err = devm_blk_ksm_init(dev, ksm, num_keyslots);

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

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  reply	other threads:[~2021-01-21 12:44 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-21  9:01 [PATCH v5 0/9] eMMC inline encryption support Eric Biggers
2021-01-21  9:01 ` [PATCH v5 1/9] mmc: add basic support for inline encryption Eric Biggers
2021-01-21  9:01 ` [PATCH v5 2/9] mmc: cqhci: rename cqhci.c to cqhci-core.c Eric Biggers
2021-01-21  9:01 ` [PATCH v5 3/9] mmc: cqhci: initialize upper 64 bits of 128-bit task descriptors Eric Biggers
2021-01-21  9:01 ` [PATCH v5 4/9] mmc: cqhci: add support for inline encryption Eric Biggers
2021-01-21 12:44   ` kernel test robot [this message]
2021-01-21 13:04   ` Ulf Hansson
2021-01-21 18:17     ` Eric Biggers
2021-01-22  9:21       ` Ulf Hansson
2021-01-21  9:01 ` [PATCH v5 5/9] mmc: cqhci: add cqhci_host_ops::program_key Eric Biggers
2021-01-21  9:01 ` [PATCH v5 6/9] firmware: qcom_scm: update comment for ICE-related functions Eric Biggers
2021-01-21 14:42   ` Ulf Hansson
2021-01-21 15:30     ` Bjorn Andersson
2021-01-21 16:25       ` Ulf Hansson
2021-01-21  9:01 ` [PATCH v5 7/9] dt-bindings: mmc: sdhci-msm: add ICE registers and clock Eric Biggers
2021-01-21  9:01 ` [PATCH v5 8/9] arm64: dts: qcom: sdm630: add ICE registers and clocks Eric Biggers
2021-01-21  9:01 ` [PATCH v5 9/9] mmc: sdhci-msm: add Inline Crypto Engine support Eric Biggers

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