From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66334C433E9 for ; Tue, 2 Feb 2021 19:48:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3CCA664DBA for ; Tue, 2 Feb 2021 19:48:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240100AbhBBTr5 (ORCPT ); Tue, 2 Feb 2021 14:47:57 -0500 Received: from frasgout.his.huawei.com ([185.176.79.56]:2479 "EHLO frasgout.his.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233200AbhBBNwP (ORCPT ); Tue, 2 Feb 2021 08:52:15 -0500 Received: from fraeml744-chm.china.huawei.com (unknown [172.18.147.201]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4DVR026ZkDz67h9N; Tue, 2 Feb 2021 21:45:22 +0800 (CST) Received: from lhreml710-chm.china.huawei.com (10.201.108.61) by fraeml744-chm.china.huawei.com (10.206.15.225) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Tue, 2 Feb 2021 14:51:33 +0100 Received: from localhost (10.47.79.68) by lhreml710-chm.china.huawei.com (10.201.108.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Tue, 2 Feb 2021 13:51:32 +0000 Date: Tue, 2 Feb 2021 13:50:46 +0000 From: Jonathan Cameron To: Ben Widawsky CC: , , Chris Browy , Dan Williams , "David Hildenbrand" , Igor Mammedov , "Ira Weiny" , Marcel Apfelbaum , Markus Armbruster , Philippe =?ISO-8859-1?Q?Mathieu-Da?= =?ISO-8859-1?Q?ud=E9?= , Vishal Verma , "John Groves (jgroves)" , "Michael S. Tsirkin" Subject: Re: [RFC PATCH v3 10/31] hw/pxb: Use a type for realizing expanders Message-ID: <20210202135046.000017ca@Huawei.com> In-Reply-To: <20210202005948.241655-11-ben.widawsky@intel.com> References: <20210202005948.241655-1-ben.widawsky@intel.com> <20210202005948.241655-11-ben.widawsky@intel.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 3.17.4 (GTK+ 2.24.32; i686-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.47.79.68] X-ClientProxiedBy: lhreml745-chm.china.huawei.com (10.201.108.195) To lhreml710-chm.china.huawei.com (10.201.108.61) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org On Mon, 1 Feb 2021 16:59:27 -0800 Ben Widawsky wrote: > This opens up the possibility for more types of expanders (other than > PCI and PCIe). We'll need this to create a CXL expander. > > Signed-off-by: Ben Widawsky Minor suggestion inline but nothing important if you don't want to change it. Jonathan > --- > hw/pci-bridge/pci_expander_bridge.c | 11 +++++++---- > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c > index aedded1064..232b7ce305 100644 > --- a/hw/pci-bridge/pci_expander_bridge.c > +++ b/hw/pci-bridge/pci_expander_bridge.c > @@ -24,6 +24,8 @@ > #include "hw/boards.h" > #include "qom/object.h" > > +enum BusType { PCI, PCIE }; > + > #define TYPE_PXB_BUS "pxb-bus" > typedef struct PXBBus PXBBus; > DECLARE_INSTANCE_CHECKER(PXBBus, PXB_BUS, > @@ -214,7 +216,8 @@ static gint pxb_compare(gconstpointer a, gconstpointer b) > 0; > } > > -static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp) > +static void pxb_dev_realize_common(PCIDevice *dev, enum BusType type, > + Error **errp) > { > PXBDev *pxb = convert_to_pxb(dev); > DeviceState *ds, *bds = NULL; > @@ -239,7 +242,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp) > } > > ds = qdev_new(TYPE_PXB_HOST); > - if (pcie) { > + if (type == PCIE) { I'd make this a switch statement now given we are about to the 3 entries and may well get more in the future. > bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS); > } else { > bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS); > @@ -287,7 +290,7 @@ static void pxb_dev_realize(PCIDevice *dev, Error **errp) > return; > } > > - pxb_dev_realize_common(dev, false, errp); > + pxb_dev_realize_common(dev, PCI, errp); > } > > static void pxb_dev_exitfn(PCIDevice *pci_dev) > @@ -339,7 +342,7 @@ static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp) > return; > } > > - pxb_dev_realize_common(dev, true, errp); > + pxb_dev_realize_common(dev, PCIE, errp); > } > > static void pxb_pcie_dev_class_init(ObjectClass *klass, void *data) From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E4EAC433E0 for ; Tue, 2 Feb 2021 14:02:56 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D7CC564DD5 for ; Tue, 2 Feb 2021 14:02:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D7CC564DD5 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=Huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:33878 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1l6wGc-0002Ly-TQ for qemu-devel@archiver.kernel.org; Tue, 02 Feb 2021 09:02:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60384) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l6w5l-0000L9-Qy for qemu-devel@nongnu.org; Tue, 02 Feb 2021 08:51:41 -0500 Received: from frasgout.his.huawei.com ([185.176.79.56]:2095) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1l6w5h-0003pJ-68 for qemu-devel@nongnu.org; Tue, 02 Feb 2021 08:51:41 -0500 Received: from fraeml744-chm.china.huawei.com (unknown [172.18.147.201]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4DVR026ZkDz67h9N; Tue, 2 Feb 2021 21:45:22 +0800 (CST) Received: from lhreml710-chm.china.huawei.com (10.201.108.61) by fraeml744-chm.china.huawei.com (10.206.15.225) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Tue, 2 Feb 2021 14:51:33 +0100 Received: from localhost (10.47.79.68) by lhreml710-chm.china.huawei.com (10.201.108.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Tue, 2 Feb 2021 13:51:32 +0000 Date: Tue, 2 Feb 2021 13:50:46 +0000 From: Jonathan Cameron To: Ben Widawsky Subject: Re: [RFC PATCH v3 10/31] hw/pxb: Use a type for realizing expanders Message-ID: <20210202135046.000017ca@Huawei.com> In-Reply-To: <20210202005948.241655-11-ben.widawsky@intel.com> References: <20210202005948.241655-1-ben.widawsky@intel.com> <20210202005948.241655-11-ben.widawsky@intel.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 3.17.4 (GTK+ 2.24.32; i686-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.47.79.68] X-ClientProxiedBy: lhreml745-chm.china.huawei.com (10.201.108.195) To lhreml710-chm.china.huawei.com (10.201.108.61) X-CFilter-Loop: Reflected Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Hildenbrand , Vishal Verma , "John Groves \(jgroves\)" , Chris Browy , qemu-devel@nongnu.org, linux-cxl@vger.kernel.org, Markus Armbruster , "Michael S. Tsirkin" , Igor Mammedov , Dan Williams , Ira Weiny , Philippe =?ISO-8859-1?Q?Mathieu-Da?= =?ISO-8859-1?Q?ud=E9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, 1 Feb 2021 16:59:27 -0800 Ben Widawsky wrote: > This opens up the possibility for more types of expanders (other than > PCI and PCIe). We'll need this to create a CXL expander. > > Signed-off-by: Ben Widawsky Minor suggestion inline but nothing important if you don't want to change it. Jonathan > --- > hw/pci-bridge/pci_expander_bridge.c | 11 +++++++---- > 1 file changed, 7 insertions(+), 4 deletions(-) > > diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c > index aedded1064..232b7ce305 100644 > --- a/hw/pci-bridge/pci_expander_bridge.c > +++ b/hw/pci-bridge/pci_expander_bridge.c > @@ -24,6 +24,8 @@ > #include "hw/boards.h" > #include "qom/object.h" > > +enum BusType { PCI, PCIE }; > + > #define TYPE_PXB_BUS "pxb-bus" > typedef struct PXBBus PXBBus; > DECLARE_INSTANCE_CHECKER(PXBBus, PXB_BUS, > @@ -214,7 +216,8 @@ static gint pxb_compare(gconstpointer a, gconstpointer b) > 0; > } > > -static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp) > +static void pxb_dev_realize_common(PCIDevice *dev, enum BusType type, > + Error **errp) > { > PXBDev *pxb = convert_to_pxb(dev); > DeviceState *ds, *bds = NULL; > @@ -239,7 +242,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp) > } > > ds = qdev_new(TYPE_PXB_HOST); > - if (pcie) { > + if (type == PCIE) { I'd make this a switch statement now given we are about to the 3 entries and may well get more in the future. > bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS); > } else { > bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS); > @@ -287,7 +290,7 @@ static void pxb_dev_realize(PCIDevice *dev, Error **errp) > return; > } > > - pxb_dev_realize_common(dev, false, errp); > + pxb_dev_realize_common(dev, PCI, errp); > } > > static void pxb_dev_exitfn(PCIDevice *pci_dev) > @@ -339,7 +342,7 @@ static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp) > return; > } > > - pxb_dev_realize_common(dev, true, errp); > + pxb_dev_realize_common(dev, PCIE, errp); > } > > static void pxb_pcie_dev_class_init(ObjectClass *klass, void *data)