From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4A27C2B9F7 for ; Mon, 24 May 2021 18:28:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AF0556140F for ; Mon, 24 May 2021 18:28:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233804AbhEXS3i (ORCPT ); Mon, 24 May 2021 14:29:38 -0400 Received: from new3-smtp.messagingengine.com ([66.111.4.229]:55495 "EHLO new3-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233826AbhEXS3e (ORCPT ); Mon, 24 May 2021 14:29:34 -0400 Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailnew.nyi.internal (Postfix) with ESMTP id 4765F581E77; Mon, 24 May 2021 14:28:05 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute6.internal (MEProxy); Mon, 24 May 2021 14:28:05 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svenpeter.dev; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=2fewIY8SSeOIN MWuX04BZLhEUB7cqd8i9hwPLOWHdeY=; b=r4g5LIrUfm4HTwFGDPybjTlZaIJoC u0g4bgplBwxMKrR0W2ts+TzDqCGMiBjPHqGMkcLgkZocztyJfERxVKTJsIusONe3 LrZoCtN5gEwc3yoLDBelZOjGAeHyAFrstz9k7sn1Hcj6MTKkgM/TRIhTSiD32C3I ACDYN/lQCEz3DGEb1rgGrcBoqWSfeR7DHL3QBUnkQ3PJV8brIRL7lmOuQPIaZn9M /eVWRWDanRwrms6hKKWIQLfDhXkjVEKxLgy9Nm2IBex3SlV18MRfhOAUPyZVTALK W6xQartIELHA+dgGKYf2g8GrJ74JbtvgwtaJjcvJG/Ao0TvS2mBh3BRgA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm2; bh=2fewIY8SSeOINMWuX04BZLhEUB7cqd8i9hwPLOWHdeY=; b=Bdh4cKCJ 6B/+t4L2ERzwEv/DNZle7PnXB5ogDZA2XAkZQ94VvVJIgni1HmtzXyEEwnWj5t7/ mO1vuJEmRYnVxx7TW/27y6gG0gkrvAQKxKg1auxUmrEBcT0X/XcREFj7E1g8w+nP YpK0ZI+gdwXANayau9Ku4aMw55+94tIw0BD0jQmRLE5//HGWYwypTQ2MQ91vR4+f tkb8E9miSwjhtyA02JA8EsuhbhMDS5rt3bLMc+nHlNG76oYTebDOMOYFQFq31/LY 3v3QlN1KQniM9Ks0fGAzfpItStX0Bt98I2hwv4QoEBdNzHaGRcappmPCDH1O4+Mn 254fyMc821sEDw== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrvdejledguddvjecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofgjfhgggfestdekredtredttdenucfhrhhomhepufhvvghn ucfrvghtvghruceoshhvvghnsehsvhgvnhhpvghtvghrrdguvghvqeenucggtffrrghtth gvrhhnpeetvdekteeluefffffhkeetteffgefggfevheeileeufedvtdeuffevveelhfef jeenucfkphepudejiedrudelledrvdduuddruddvgeenucevlhhushhtvghrufhiiigvpe dtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehsvhgvnhesshhvvghnphgvthgvrhdruggv vh X-ME-Proxy: Received: from photon.s7r42.com (ip-176-199-211-124.hsi06.unitymediagroup.de [176.199.211.124]) by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 24 May 2021 14:28:02 -0400 (EDT) From: Sven Peter To: devicetree@vger.kernel.org, linux-clk@vger.kernel.org Cc: Sven Peter , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Hector Martin , Michael Turquette , Rob Herring , Stephen Boyd , Mark Kettenis , Arnd Bergmann Subject: [PATCH 3/3] arm64: apple: add uart gate clocks Date: Mon, 24 May 2021 20:27:45 +0200 Message-Id: <20210524182745.22923-4-sven@svenpeter.dev> X-Mailer: git-send-email 2.30.1 (Apple Git-130) In-Reply-To: <20210524182745.22923-1-sven@svenpeter.dev> References: <20210524182745.22923-1-sven@svenpeter.dev> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that we have a driver for gate clocks add the proper topology for the UART. These are already enabled by the bootloader but are part of the clock topology used by devices yet to be implemented. Signed-off-by: Sven Peter --- arch/arm64/boot/dts/apple/t8103.dtsi | 36 +++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi index a1e22a2ea2e5..b7c85b800efd 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -120,7 +120,7 @@ serial0: serial@235200000 { * TODO: figure out the clocking properly, there may * be a third selectable clock. */ - clocks = <&clk24>, <&clk24>; + clocks = <&clock_uart0>, <&clk24>; clock-names = "uart", "clk_uart_baud0"; status = "disabled"; }; @@ -131,5 +131,39 @@ aic: interrupt-controller@23b100000 { interrupt-controller; reg = <0x2 0x3b100000 0x0 0x8000>; }; + + clock_sio_busif: clock-sio-busif@23b7001c0 { + compatible = "apple,t8103-gate-clock"; + #clock-cells = <0>; + reg = <0x2 0x3b7001c0 0x0 0x4>; + clock-output-names = "clock_sio_busif"; + }; + + clock_sio: clock-sio@23b7001c8 { + compatible = "apple,t8103-gate-clock"; + #clock-cells = <0>; + reg = <0x2 0x3b7001c8 0x0 0x4>; + clocks = <&clock_sio_busif>; + clock-names = "clock_sio_busif"; + clock-output-names = "clock_sio"; + }; + + clock_uart_p: clock-uart-p@23b700220 { + reg = <0x2 0x3b700220 0 4>; + compatible = "apple,t8103-gate-clock"; + #clock-cells = <0>; + clock-output-names = "clock_uart_p"; + clocks = <&clock_sio>; + clock-names = "clock_sio"; + }; + + clock_uart0: clock-uart0@23b700270 { + reg = <0x2 0x3b700270 0 4>; + compatible = "apple,t8103-gate-clock"; + #clock-cells = <0>; + clock-output-names = "clock_uart0"; + clocks = <&clock_uart_p>; + clock-names = "clock_uart_p"; + }; }; }; -- 2.25.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9689FC2B9F7 for ; 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Mon, 24 May 2021 14:28:02 -0400 (EDT) From: Sven Peter To: devicetree@vger.kernel.org, linux-clk@vger.kernel.org Cc: Sven Peter , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Hector Martin , Michael Turquette , Rob Herring , Stephen Boyd , Mark Kettenis , Arnd Bergmann Subject: [PATCH 3/3] arm64: apple: add uart gate clocks Date: Mon, 24 May 2021 20:27:45 +0200 Message-Id: <20210524182745.22923-4-sven@svenpeter.dev> X-Mailer: git-send-email 2.30.1 (Apple Git-130) In-Reply-To: <20210524182745.22923-1-sven@svenpeter.dev> References: <20210524182745.22923-1-sven@svenpeter.dev> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210524_112806_184600_DEAC30FA X-CRM114-Status: GOOD ( 11.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Now that we have a driver for gate clocks add the proper topology for the UART. These are already enabled by the bootloader but are part of the clock topology used by devices yet to be implemented. Signed-off-by: Sven Peter --- arch/arm64/boot/dts/apple/t8103.dtsi | 36 +++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi index a1e22a2ea2e5..b7c85b800efd 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -120,7 +120,7 @@ serial0: serial@235200000 { * TODO: figure out the clocking properly, there may * be a third selectable clock. */ - clocks = <&clk24>, <&clk24>; + clocks = <&clock_uart0>, <&clk24>; clock-names = "uart", "clk_uart_baud0"; status = "disabled"; }; @@ -131,5 +131,39 @@ aic: interrupt-controller@23b100000 { interrupt-controller; reg = <0x2 0x3b100000 0x0 0x8000>; }; + + clock_sio_busif: clock-sio-busif@23b7001c0 { + compatible = "apple,t8103-gate-clock"; + #clock-cells = <0>; + reg = <0x2 0x3b7001c0 0x0 0x4>; + clock-output-names = "clock_sio_busif"; + }; + + clock_sio: clock-sio@23b7001c8 { + compatible = "apple,t8103-gate-clock"; + #clock-cells = <0>; + reg = <0x2 0x3b7001c8 0x0 0x4>; + clocks = <&clock_sio_busif>; + clock-names = "clock_sio_busif"; + clock-output-names = "clock_sio"; + }; + + clock_uart_p: clock-uart-p@23b700220 { + reg = <0x2 0x3b700220 0 4>; + compatible = "apple,t8103-gate-clock"; + #clock-cells = <0>; + clock-output-names = "clock_uart_p"; + clocks = <&clock_sio>; + clock-names = "clock_sio"; + }; + + clock_uart0: clock-uart0@23b700270 { + reg = <0x2 0x3b700270 0 4>; + compatible = "apple,t8103-gate-clock"; + #clock-cells = <0>; + clock-output-names = "clock_uart0"; + clocks = <&clock_uart_p>; + clock-names = "clock_uart_p"; + }; }; }; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel